Paul A. Clayton wrote:
> Do you happen to know what the cost, bandwidth, and
> (perhaps even) power differences are between different
> types of integration?

I don't know numbers for these but I can tell you that the order from highest cost, highest bandwidth and lowest power to the opposite is: die stacking with through silicon vias, then silicon interposer then putting multiple flip-chips on the FR4 substrate inside a package. When putting multiple flip-chips on a FR4 substrate, you might need a few more layers in the substrate but that cost is tiny compared to the cost of the chips.

> I was under the impression that silicon interposer was
> progressing the learning curve rather quickly now and
> provides much better bandwidth per area of interface at
> projected reasonable incremental cost (once reasonably
> mature).

Silicon interposers do seem to be getting more popular. Xilinx uses them in their biggest FPGAs. Silicon interposers are a good use for older fabs.

> By the way, would it be practical to use a small portion
> of the silicon interposer 'chip' for I/O interfaces (using
> a simple, full depreciated process technology--I receive
> the impression that at least some I/O interfaces do not
> benefit from smaller transistors)?

That is an interesting idea that I haven't heard before. I think you're right that some I/O interfaces don't need the most advanced transistors (since you're not talking about a 28 GBit/sec SERDES). The drawback to putting I/O buffers on the silicon interposer is that there would be more processing steps to manufacture the silicon interposer. When the silicon interposer just contains wiring, it doesn't need gate oxide and diffusion steps to make transistors.

> Presumably the "stepper" would be more of a 'leaper'
> (skipping over area that is just for the interposer)

I agree that the stepper only needs to expose area for the bottom layers in the area that contains transistors. Of course, the stepper has to expose the whole silicon interposer for the upper (wiring) layers.

I think putting L4 cache chips and a processor on a silicon interposer is practical. My feeling about having transistors in the silicon interposer is that it is probably not worth the additional cost. I don't know if a silicon interposer is overkill for connecting a processor to some L4 cache chips. For a desktop processor, I think it would be preferable to use the FR4 substrate that is already in the package but I don't know how much performance would be lost compared to a silicon interposer.