Article: AMD's Mobile Strategy
By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), January 6, 2012 8:31 pm
Room: Moderated Discussions
Bill Henkel (noemail@yahoo.com) on 1/6/12 wrote:
---------------------------
>Paul A. Clayton wrote:
[snip somewhat obvious "better is more expensive"]
[snip]
>Silicon interposers do seem to be getting more popular.
>Xilinx uses them in their biggest FPGAs. Silicon
>interposers are a good use for older fabs.
Also, I seem to recall reading that such is being used to
connect low power, wide-interface memory to processors.
[snip]
>That is an interesting idea that I haven't heard before.
Thanks for the compliment. Maybe someday one of my
technology ideas will lead to something useful (excluding
independent invention; several times already people have
stolen my ideas, invented time travel, and used them before
I thought of them :-).
>I think you're right that some I/O interfaces don't need
>the most advanced transistors (since you're not talking
>about a 28 GBit/sec SERDES). The drawback to putting I/O
>buffers on the silicon interposer is that there would be
>more processing steps to manufacture the silicon
>interposer. When the silicon interposer just contains
>wiring, it doesn't need gate oxide and diffusion steps to
>make transistors.
Yes, though I received the impression that some of the
steps are sufficiently localized (e.g. ion implantation?)
that the cost would not be quite as high as "fully formed"
chips. Even so, it does seem like a doubtful possibly, but
I threw it out because it came to mind and did not seem
entirely implausible.
>> Presumably the "stepper" would be more of a 'leaper'
>> (skipping over area that is just for the interposer)
>
>I agree that the stepper only needs to expose area for the
>bottom layers in the area that contains transistors. Of
>course, the stepper has to expose the whole silicon
>interposer for the upper (wiring) layers.
>
>I think putting L4 cache chips and a processor on a
>silicon interposer is practical. My feeling about having
>transistors in the silicon interposer is that it is
>probably not worth the additional cost. I don't know if a
>silicon interposer is overkill for connecting a processor
>to some L4 cache chips. For a desktop processor, I think
>it would be preferable to use the FR4 substrate that is
>already in the package but I don't know how much
>performance would be lost compared to a silicon interposer.
Unfortunately, unless the L4 chip was specialized to act
also as a memory buffer chip (i.e., pass through, possibly
with some translation) and contain tags, it seems that an
off-chip L4 would have too much impact on the processor
itself. A specialized L4 chip would be expensive, even if
design costs were relatively small--having relatively few
design elements with lots of replication--(though for
Intel--having its own fabs--such might be used during
process ramp-up because such a chip might be very resilient
with respect to defects/variation, allowing early
productive use while learning/tweaking).
Thanks for the response and the knowledge sharing.
---------------------------
>Paul A. Clayton wrote:
[snip somewhat obvious "better is more expensive"]
[snip]
>Silicon interposers do seem to be getting more popular.
>Xilinx uses them in their biggest FPGAs. Silicon
>interposers are a good use for older fabs.
Also, I seem to recall reading that such is being used to
connect low power, wide-interface memory to processors.
[snip]
>That is an interesting idea that I haven't heard before.
Thanks for the compliment. Maybe someday one of my
technology ideas will lead to something useful (excluding
independent invention; several times already people have
stolen my ideas, invented time travel, and used them before
I thought of them :-).
>I think you're right that some I/O interfaces don't need
>the most advanced transistors (since you're not talking
>about a 28 GBit/sec SERDES). The drawback to putting I/O
>buffers on the silicon interposer is that there would be
>more processing steps to manufacture the silicon
>interposer. When the silicon interposer just contains
>wiring, it doesn't need gate oxide and diffusion steps to
>make transistors.
Yes, though I received the impression that some of the
steps are sufficiently localized (e.g. ion implantation?)
that the cost would not be quite as high as "fully formed"
chips. Even so, it does seem like a doubtful possibly, but
I threw it out because it came to mind and did not seem
entirely implausible.
>> Presumably the "stepper" would be more of a 'leaper'
>> (skipping over area that is just for the interposer)
>
>I agree that the stepper only needs to expose area for the
>bottom layers in the area that contains transistors. Of
>course, the stepper has to expose the whole silicon
>interposer for the upper (wiring) layers.
>
>I think putting L4 cache chips and a processor on a
>silicon interposer is practical. My feeling about having
>transistors in the silicon interposer is that it is
>probably not worth the additional cost. I don't know if a
>silicon interposer is overkill for connecting a processor
>to some L4 cache chips. For a desktop processor, I think
>it would be preferable to use the FR4 substrate that is
>already in the package but I don't know how much
>performance would be lost compared to a silicon interposer.
Unfortunately, unless the L4 chip was specialized to act
also as a memory buffer chip (i.e., pass through, possibly
with some translation) and contain tags, it seems that an
off-chip L4 would have too much impact on the processor
itself. A specialized L4 chip would be expensive, even if
design costs were relatively small--having relatively few
design elements with lots of replication--(though for
Intel--having its own fabs--such might be used during
process ramp-up because such a chip might be very resilient
with respect to defects/variation, allowing early
productive use while learning/tweaking).
Thanks for the response and the knowledge sharing.