Using a silicon interposer to connect a processor to L4 cache chips would have the advantage of reduced thermal resistance between the processor and the heat sink compared to stacking the cache chips on top of the processor. If the cache chips are stacked on top of the processor, the heat from the processor would have to flow through the cache chips to reach the heat sink.

David Kanter on 1/6/12 wrote:
> Silicon interposers are generally not used for active
> circuits, to avoid problems with the TSVs. People
> definitely contemplate using the area for passives

So there could be pairs of metal planes in the silicon interposer to function as decoupling capacitance.

I wonder if it is best to scrap the on-die L3 cache when there is a big off-die cache.