rwessel (robertwessel@yahoo.com) on 1/4/12 wrote:
---------------------------
[snip]
>Probably simpler just to have it be "normal" memory, just
>faster. OS's are becoming more-and-more NUMA aware, let
>the OS move hot pages to the fast memory.

Simpler, yes, but systems with less enlightened OSes might
gain relatively little benefit. (Ideally, the OS should
handle such, but I also think better hardware support for
making informed decisions could help.)

Such memory could also be differentiated in power use.
E.g., it might be practical to enter a mode where the off-
socket memory is in self-refresh mode while the processor
and off-chip 'cache' are still active.

There might also be differences in efficiency of access
based on granularity. E.g., off-socket memory might be
optimized for larger accesses and/or fewer row activates.

>I think that's attractive even for fairly ordinary DRAM -
>moving it on to the CPU package would likely let you halve
>latency without too much work. The CPU vendor could sell
>the CPU with approximately the "normal" amount of DRAM
>installed (the amount of fast RAM becomes an additional
>way to segment the market), and users could add external
>DRAM via the usual DIMMs.

Well, I would like to be able to exploit the
non-replaceable/integrated nature by using more specialized
memory. Even something as trivial as Reduced Latency DRAM
might have some benefits. There is also the very tiny
chance that an increase in volume for a more specialized
memory (at higher cost per bit) might provide an incentive
for DRAM makers to improve DRAM performance at the cost of
price or at least reduce the price and increase the
availability of higher-performance memory devices. (I am
also a fan of Virtual Channel; direct-mapping of active
rows is for farmers, though a lot of farmers buy
computers. [Apologies to Seymour Cray.])

(I am visiting Socrates in cuckoo cloud land. I will wake
to reality shortly. :-)