Process numbers

Article: Medfield, Intel's x86 Phone Chip
By: Alberto (, January 26, 2012 9:29 am
Room: Moderated Discussions
Wilco ( on 1/25/12 wrote:
>David Kanter ( on 1/24/12 wrote:
>>Wilco ( on 1/24/12 wrote:
>>>David Kanter ( on 1/24/12 wrote:
>>>>Wilco ( on 1/24/12 wrote:
>>>>>David Kanter ( on 1/23/12 wrote:
>>>We've seen a few benchmarks showing how well the A9 does vs >1.6GHz netbook Atoms,
>>I would hesitate to call them benchmarks.
>>>which may not be perfect, but they tell a different story than what Intel claims.
>>>Unless Medfield has significantly improved IPC, I'd expect it to be a little slower
>>>than the netbook variants due to a slower memory system in >mobiles.
>>Again, I place far greater stock in SPECint than the other benchmarks I've seen. You obviously differ in that regard.
>I'd be happy to see public SpecInt results. But I question whether they do translate
>to real world performance on a mobile.
>>>Also it can't run indefinitely at 1.6GHz.
>>Which I scrupulously noted : )
>>>If anything, I expect Medfield running at lower frequencies, having lower memory
>>>bandwidth, and using smaller L2 caches than the 28nm SoCs >coming out this year.
>>You're probably right, but we'll see. Also remember that Medfield has been sampling
>>for a while, while 28nm designs are just starting. So there's a bit of a time skew
>>between them (e.g. in comparison to OMAP5 and S4, which are a much cleaner comparison).
>There is not much lag between the first Medfield and Krait products. OMAP5 appears
>at around the same time as the Motorola Medfield phones. Even if A15 or Krait SoCs
>slip, there will be faster A9 SoCs such as Tegra3+ and OMAP4470. So Medfield will
>have to compete with much faster and efficient SoCs from day one.
>>>>So what is your estimate for the performance of Medfield on SPECint2000 relative to say, OMAP5, Tegra3 or S4?
>>>Are we comparing compiler tricks or micro architectures?
>>Do you compile your code? Of course you take the compiler into account, but I think
>>it's fair to stipulate both estimates.
>Compilers and options used matter as much as the micro architecture. The bodged
>Phoronix results prove that beyond any doubt!
>>>Assuming similar compiler
>>>technology, I'd estimate A9 to be 20-30% faster, and A15/Krait to be 60-100% faster
>>>at the same frequency - obviously varying considerably with >the L2 size and memory of the SoC.
>>What does similar compiler technology mean? For the purposes of SPEC, I'd assume
>>the optimal compiler for each platform, and base submission rules.
>For example use GCC or LLVM for both, or VC++ and armcc. Intel's compiler tricks
>to get good Spec results don't translate into real-world performance, so it is best
>to use production compilers as those are used in actual products.
>>>Sure, but the efficiency (performance per Watt) isn't the same. Eg. Tegra3 can
>>>run 2 cores at 1GHz using less power than Medfield at 1.6GHz (
>>>That's approximately twice the perf/Watt despite being 1 process node behind. Obviously
>>>these are NVidia vs Intel marketing numbers, so not necessarily reliable, but it gives an idea where things >stand.
>>NV's estimated numbers are not really comparable to Intel's measured numbers, they
>>were measured in different ways on totally different workloads. NV's estimates are
>>using coremark (again, rubbish benchmarks and what SKU/bin?), while Intel's numbers
>>are measured for median bin and a worse case single threaded workload. There are a lot of differences to factor out.
>NV's numbers were measured on a reference design according to the link. Tegra3
>isn't binned. Obviously there is a chance parts were cherry picked, but that applies
>to Intel too. Running micro benchmarks like Dhrystone/CoreMark gives close to maximum power consumption.
>>>>You don't get 70% more performance while still having something recognizable as a cell phone.
>>>A process node change can give that kind of improvement due >to faster and lower power transistors.
>>No it's can't. You might get 20-30%.
>A recent GF/ARM press release about 20nm states: "The 20nm TQV is based on GLOBALFOUNDRIES’
>next-generation 20nm platform, which is designed to improve performance by up to
>35% and nearly halve power consumption when compared to 28nm technologies.". That
>shows large improvement are being made.

This is not true obviously. As usual manifacturers give peak numbers in optimal circumstances and simple test circuits. Every process node gives 20% of clock boost and a power reduction in shipped devices of around 30/35% (same architecture). Look at the semiconductor history.

Too bad for GF and TSMC (and partners), the 20nm process node will be a nightmare without Finfet or Trigate.
IMO the 20nm process will be more like a so so but feasible 25nm process (half node 28-20nm). Once again Intel will have the absolute lead.
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