David Kanter (dkanter@realworldtech.com) on 4/27/12 wrote:
---------------------------
>Exophase (exophase@gmail.com) on 4/27/12 wrote:
>---------------------------
[snip]
>>If all three AGUs can forward to two L/S paths then it's
>>useful even with memory reordering, as is the case in
>>Sandy Bridge, right?
>
>Absolutely. In fact, it's more useful in the context of
>the K8 than Sandy Bridge. The K8 cannot re-order so you
>REALLY want to calculate every address as soon as possible.

Didn't K8 have three mostly independent schedulers where a
macro-op would be assigned an ALU+AGU pipeline after
decode? If so, address generation might not be as early as
possible with a unified scheduler (if two address
generation operations become ready in the same cycle but
have been placed in the same pipeline, only one can execute
in the cycle that they both become ready).

I doubt this effect was large, but I suspect it introduced
a measurable penalty.

It does seem that using partitioned (or partially
partitioned) schedulers could save energy, especially if
artificial under-issue could be avoided. The use of an
L2 scheduler might help (at least helping avoid capacity
imbalance). More intelligent allocation of operations to
schedulers and execution units might help, if the cost of
the intelligence was less than the savings from less
orthogonal constraints. (The compiler could theoretically
help, but probably not realistically, especially for x86.
A decoded instruction cache or trace cache could help.)

Unfortunately (for such an idea being used), the design
complexity budget would probably be better spent
elsewhere.