EduardoS (no.delete@this.spam.com) on August 14, 2012 6:07 am wrote:
> anon (anon.delete@this.anon.com) on August 14, 2012 5:28 am wrote:
> > Intel
> and
> > AMD both spend effort to make cmov for example run fast and low
> latency. Intel
> > optimization manual recommends using it. Eliminating
> fundamentally unpredictable
> > branches will reduce pressure on branch
> predictor for predictable branches and
> > avoid mispredicts.
>
> x86 have a
> longer decoding pipeline, mispredictions are more costly.
>

Except for Bulldozer, the branch mispredict penalty measured in clock cycles on x86 cores and on "big" Cortex-A cores (i.e. 8/9/15) is very similar. May be even lower on SandyB/IvyB running out of L0I cache.
Despite that, the second part of your statement is still correct (with possible exception of Atom and, may be, Bobcat), due to higher amount of work done by x86 processors in each clock cycle.