32 GPRs ~2-3%

Article: ARM Goes 64-bit
By: Exophase (exophase.delete@this.gmail.com), August 16, 2012 10:06 pm
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on August 16, 2012 6:27 pm wrote:
> As David Kanter noted, ARM's load-store
> nature would presumably modestly increase the benefit of more registers.
> Presumably some loop-rich workloads could also benefit from more registers (for
> unrolling and software pipelining). (I vaguely recall some paper from IBM
> indicating that some FP workloads had loops with some register spilling due to
> register pressure even at 32 registers. If one uses the same fields for FP/SIMD
> and GPR register names, having a 5-bit field could be appropriate.)

It's not just lack of load-op (and RMW) that makes ARM a big more register hungry, it's also the lack of large immediates and [reg + reg + imm] memory addressing. If immediates and constant memory locations are used a lot in inner loops they can be cached in registers outside of the loop. I often have several constant registers in tight inner loops in ARM ASM.

Three operand addressing pushes back against this a bit though.

I could also see more registers being useful in cases where predication makes sense, and is more available than it may have been on x86. For instance, merging the result of two small conditional arms with a select.

And with x86 you don't have to spend a register for return addresses; while this is often turned into a temporary after the register is saved on the stack it's nice to be able to keep it around in leaf functions (or ones which won't always call other functions anyway, which will sometimes be some of the more performance critical paths)

I do wonder what the exact context is for Mitch Aslup's figures. Is it an average over several types of designs, or does it only apply to high end very aggressively OoO chips? There has been some discussion here before about whether or not AArch64's register provisions were done with in-order chips in mind (to better facilitate software scheduling). The point was raised that lower end processors wouldn't need to be 64-bit any time soon, but if ARM's big.LITTLE topology proves successful then surely it'll get ported to ARMv8 within a few years. And in that case the little CPU is going to have to support whatever instruction set the big one does, and I'm sure it won't have anywhere near the reordering depth.

> It might also be noted that AArch64 moves the
> stack pointer and PC into a special register space while the link register is a
> GPR (and there is a zero register).

SP is really kind of halfway between GPR and special register, which can be accessed as r31 for some fields in some operands - where it's otherwise a constant zero. This is IMO a pretty intuitive use of the register which I haven't seen before in any of the big RISCs, although PowerPC does have some repurposing of the field. Either way, with a similar instruction set but modified for only 4-bit register fields you'd still have only 15 GPRs given the same zero/SP register. So it'd at least be a bit below x86's allocation capability for 16 GPRs.
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New Article: ARM Goes 64-bitDavid Kanter2012/08/14 12:04 AM
  New Article: ARM Goes 64-bitnone2012/08/14 12:44 AM
    New Article: ARM Goes 64-bitDavid Kanter2012/08/14 01:04 AM
    MIPS MT-ASEPaul A. Clayton2012/08/14 09:01 AM
      MONITOR/MWAITEduardoS2012/08/14 10:08 AM
        MWAIT not specifically MTPaul A. Clayton2012/08/14 10:36 AM
          MWAIT not specifically MTEduardoS2012/08/15 03:16 PM
        MONITOR/MWAITanonymou52012/08/14 11:07 AM
          MONITOR/MWAITEduardoS2012/08/15 03:20 PM
      MIPS MT-ASErwessel2012/08/14 10:14 AM
  New Article: ARM Goes 64-bitSHK2012/08/14 02:01 AM
  New Article: ARM Goes 64-bitanon2012/08/14 02:37 AM
    New Article: ARM Goes 64-bitRichard Cownie2012/08/14 03:57 AM
      New Article: ARM Goes 64-bitanon2012/08/14 04:29 AM
      New Article: ARM Goes 64-bitnone2012/08/14 04:44 AM
        New Article: ARM Goes 64-bitanon2012/08/14 05:28 AM
          New Article: ARM Goes 64-bitanon2012/08/14 05:32 AM
            New Article: ARM Goes 64-bitEduardoS2012/08/14 06:06 AM
          New Article: ARM Goes 64-bitnone2012/08/14 05:40 AM
            AArch64 select better than cmovPaul A. Clayton2012/08/14 06:08 AM
            New Article: ARM Goes 64-bitanon2012/08/14 06:12 AM
              New Article: ARM Goes 64-bitnone2012/08/14 06:25 AM
                Predicated ld/store are usefulPaul A. Clayton2012/08/14 06:48 AM
                  Predicated ld/store are usefulnone2012/08/14 06:56 AM
                    Predicated ld/store are usefulanon2012/08/14 07:07 AM
                    Predicated stores might not be that badPaul A. Clayton2012/08/14 07:27 AM
                      Predicated stores might not be that badDavid Kanter2012/08/15 01:14 AM
                        Predicated stores might not be that badMichael S2012/08/15 11:41 AM
                        Predicated stores might not be that badR Byron2012/08/17 04:09 AM
                New Article: ARM Goes 64-bitanon2012/08/14 06:54 AM
                  New Article: ARM Goes 64-bitnone2012/08/14 07:04 AM
                    New Article: ARM Goes 64-bitanon2012/08/14 07:43 AM
          New Article: ARM Goes 64-bitEduardoS2012/08/14 06:07 AM
            New Article: ARM Goes 64-bitanon2012/08/14 06:20 AM
              New Article: ARM Goes 64-bitnone2012/08/14 06:29 AM
                New Article: ARM Goes 64-bitanon2012/08/14 07:00 AM
            New Article: ARM Goes 64-bitMichael S2012/08/14 03:43 PM
        New Article: ARM Goes 64-bitRichard Cownie2012/08/14 06:53 AM
          OT: Conrad's "Youth"Richard Cownie2012/08/14 07:20 AM
      New Article: ARM Goes 64-bitEduardoS2012/08/14 06:04 AM
        New Article: ARM Goes 64-bitmpx2012/08/14 08:59 AM
          New Article: ARM Goes 64-bitAntti-Ville Tuunainen2012/08/14 09:16 AM
        New Article: ARM Goes 64-bitanonymou52012/08/14 11:03 AM
          New Article: ARM Goes 64-bitname992012/11/17 03:31 PM
            Microarchitecting a counter registerPaul A. Clayton2012/11/17 07:37 PM
    New Article: ARM Goes 64-bitbakaneko2012/08/14 04:21 AM
      New Article: ARM Goes 64-bitname992012/11/17 03:40 PM
        New Article: ARM Goes 64-bitEduardoS2012/11/17 04:52 PM
        New Article: ARM Goes 64-bitDoug S2012/11/17 05:48 PM
        New Article: ARM Goes 64-bitbakaneko2012/11/18 05:40 PM
          New Article: ARM Goes 64-bitWilco2012/11/19 07:59 AM
            New Article: ARM Goes 64-bitEduardoS2012/11/19 08:23 AM
              New Article: ARM Goes 64-bitWilco2012/11/19 09:31 AM
                Downloading µarch-specific binaries?Paul A. Clayton2012/11/19 11:21 AM
                New Article: ARM Goes 64-bitEduardoS2012/11/19 11:41 AM
                  New Article: ARM Goes 64-bitWilco2012/11/21 07:44 AM
                    JIT vs. static compilation (Was: New Article: ARM Goes 64-bit)VMguy2012/11/22 03:21 AM
                      JIT vs. static compilation (Was: New Article: ARM Goes 64-bit)David Kanter2012/11/22 12:12 PM
                        JIT vs. static compilation (Was: New Article: ARM Goes 64-bit)Gabriele Svelto2012/11/23 03:50 AM
                    New Article: ARM Goes 64-bitEduardoS2012/11/23 10:09 AM
                      New Article: ARM Goes 64-bitEBFE2012/11/26 01:24 AM
                        New Article: ARM Goes 64-bitGabriele Svelto2012/11/26 03:33 AM
                          New Article: ARM Goes 64-bitEBFE2012/11/27 11:17 PM
                            New Article: ARM Goes 64-bitGabriele Svelto2012/11/28 02:32 AM
                        New Article: ARM Goes 64-bitEduardoS2012/11/26 12:16 PM
                          New Article: ARM Goes 64-bitEBFE2012/11/28 12:33 AM
                            New Article: ARM Goes 64-bitEduardoS2012/11/28 05:53 AM
                              New Article: ARM Goes 64-bitMichael S2012/11/28 06:15 AM
                                New Article: ARM Goes 64-bitEduardoS2012/11/28 07:33 AM
                                  New Article: ARM Goes 64-bitMichael S2012/11/28 09:16 AM
                                    New Article: ARM Goes 64-bitEduardoS2012/11/28 09:53 AM
                                    New Article: ARM Goes 64-bitEugene Nalimov2012/11/28 05:58 PM
                                      Amazing!EduardoS2012/11/28 07:25 PM
                                        Amazing! (non-italic response)EduardoS2012/11/28 07:25 PM
                                        Amazing!EBFE2012/11/28 08:20 PM
                                          Undefined behaviour doubles downEduardoS2012/11/28 09:10 PM
                              New Article: ARM Goes 64-bitEBFE2012/11/28 07:54 PM
                                New Article: ARM Goes 64-bitEduardoS2012/11/28 09:21 PM
                Have you heard of Transmeta?David Kanter2012/11/19 03:47 PM
            New Article: ARM Goes 64-bitbakaneko2012/11/19 09:08 AM
            New Article: ARM Goes 64-bitDavid Kanter2012/11/19 03:40 PM
              Semantic Dictionary EncodingRay2012/11/19 10:37 PM
              New Article: ARM Goes 64-bitRohit2012/11/20 04:48 PM
                New Article: ARM Goes 64-bitDavid Kanter2012/11/20 11:07 PM
                  New Article: ARM Goes 64-bitWilco2012/11/21 06:41 AM
                    New Article: ARM Goes 64-bitDavid Kanter2012/11/21 10:12 AM
                    A JIT exampleMark Roulo2012/11/21 10:30 AM
                      A JIT exampleWilco2012/11/21 07:04 PM
                        A JIT examplerwessel2012/11/21 09:05 PM
                        A JIT exampleGabriele Svelto2012/11/23 03:53 AM
                        A JIT exampleEduardoS2012/11/23 10:13 AM
                          A JIT exampleWilco2012/11/23 01:41 PM
                            A JIT exampleEduardoS2012/11/23 02:06 PM
                            A JIT exampleGabriele Svelto2012/11/23 04:09 PM
                              A JIT exampleSymmetry2012/11/26 05:58 AM
            New Article: ARM Goes 64-bitRay2012/11/19 10:27 PM
    New Article: ARM Goes 64-bitDavid Kanter2012/08/14 09:11 AM
  v7-M is Thumb-onlyPaul A. Clayton2012/08/14 06:58 AM
  Minor suggested correctionPaul A. Clayton2012/08/14 08:33 AM
    Minor suggested correctionanon2012/08/14 08:57 AM
  New Article: ARM Goes 64-bitExophase2012/08/14 08:33 AM
    New Article: ARM Goes 64-bitDavid Kanter2012/08/14 09:16 AM
      New Article: ARM Goes 64-bitjigal2012/08/15 01:49 PM
  Correction re ARM and BBC MicroPaul2012/08/14 08:59 PM
    Correction re ARM and BBC MicroPer Hesselgren2012/08/15 03:27 AM
  Memory BW so lowPer Hesselgren2012/08/15 03:14 AM
    Memory BW so lownone2012/08/15 11:16 AM
  New Article: ARM Goes 64-bitdado2012/08/15 10:25 AM
  Number of GPRsKenneth Jonsson2012/08/16 02:35 PM
    Number of GPRsExophase2012/08/16 02:52 PM
      Number of GPRsKenneth Jonsson2012/08/17 02:41 AM
        Ooops, missing link...Kenneth Jonsson2012/08/17 02:44 AM
        64-bit pointers eat some performancePaul A. Clayton2012/08/17 06:19 AM
          64-bit pointers eat some performancebakaneko2012/08/17 08:37 AM
            Brute force seems to workPaul A. Clayton2012/08/17 10:08 AM
              Brute force seems to workbakaneko2012/08/17 11:15 AM
          64-bit pointers eat some performanceRichard Cownie2012/08/17 08:46 AM
            Pointer compression is atypicalPaul A. Clayton2012/08/17 10:43 AM
              Pointer compression is atypicalRichard Cownie2012/08/17 12:57 PM
                Pointer compression is atypicalHoward Chu2012/08/22 10:17 PM
                  Pointer compression is atypicalRichard Cownie2012/08/23 04:48 AM
                    Pointer compression is atypicalHoward Chu2012/08/23 06:51 AM
              Pointer compression is atypicalWilco2012/08/17 02:41 PM
                Pointer compression is atypicalRichard Cownie2012/08/17 04:13 PM
                  Pointer compression is atypicalRicardo B2012/08/19 10:44 AM
                  Pointer compression is atypicalHoward Chu2012/08/22 10:08 PM
                    Unified libraries?Paul A. Clayton2012/08/23 07:49 AM
                    Pointer compression is atypicalRichard Cownie2012/08/23 08:44 AM
                      Pointer compression is atypicalHoward Chu2012/08/23 05:17 PM
                        Pointer compression is atypicalanon2012/08/23 08:15 PM
                          Pointer compression is atypicalHoward Chu2012/08/23 09:33 PM
            64-bit pointers eat some performanceFoo_2012/08/18 12:09 PM
              64-bit pointers eat some performanceRichard Cownie2012/08/18 05:25 PM
                64-bit pointers eat some performanceRichard Cownie2012/08/18 05:32 PM
            Page-related benefit of small pointersPaul A. Clayton2012/08/23 08:36 AM
        Number of GPRsWilco2012/08/17 06:31 AM
          Number of GPRsKenneth Jonsson2012/08/17 11:54 AM
            Number of GPRsExophase2012/08/17 12:44 PM
              Number of GPRsKenneth Jonsson2012/08/17 01:22 PM
                Number of GPRsWilco2012/08/17 02:53 PM
        What about dynamic utilization?Exophase2012/08/17 09:30 AM
          Compiler vs. assembly aliasing knowledge?Paul A. Clayton2012/08/17 10:20 AM
            Compiler vs. assembly aliasing knowledge?Exophase2012/08/17 11:09 AM
            Compiler vs. assembly aliasing knowledge?anon2012/08/18 02:23 AM
              Compiler vs. assembly aliasing knowledge?Ricardo B2012/08/19 11:02 AM
                Compiler vs. assembly aliasing knowledge?anon2012/08/19 06:07 PM
                  Compiler vs. assembly aliasing knowledge?Ricardo B2012/08/19 07:26 PM
                    Compiler vs. assembly aliasing knowledge?anon2012/08/19 10:03 PM
                      Compiler vs. assembly aliasing knowledge?anon2012/08/20 01:59 AM
        Number of GPRsDavid Kanter2012/08/17 12:46 PM
          RAT issues as part of reason 1Paul A. Clayton2012/08/17 02:18 PM
        Number of GPRsname992012/11/17 06:37 PM
          Large ARFs increase renaming costPaul A. Clayton2012/11/17 09:23 PM
    Number of GPRsDavid Kanter2012/08/16 03:31 PM
    Number of GPRsRichard Cownie2012/08/16 05:17 PM
    32 GPRs ~2-3%Paul A. Clayton2012/08/16 06:27 PM
      Oops, Message-ID: aaed6e38-c7bd-467e-ba41-f40cf1020e5e@googlegroups.com (NT)Paul A. Clayton2012/08/16 06:29 PM
      32 GPRs ~2-3%Exophase2012/08/16 10:06 PM
        R31 as SP/zero is kind of neat (NT)Paul A. Clayton2012/08/17 06:23 AM
        32 GPRs ~2-3%rwessel2012/08/17 08:24 AM
          32 GPRs ~2-3%Exophase2012/08/17 09:16 AM
            32 GPRs ~2-3%Max2012/08/17 04:19 PM
      32 GPRs ~2-3%name992012/11/17 07:43 PM
    Number of GPRsmpx2012/08/17 01:11 AM
      Latency and powerPaul A. Clayton2012/08/17 06:54 AM
    Number of GPRsbakaneko2012/08/17 03:09 AM
  New Article: ARM Goes 64-bitSteve2012/08/17 02:12 PM
    New Article: ARM Goes 64-bitDavid Kanter2012/08/19 12:42 PM
      New Article: ARM Goes 64-bitDoug S2012/08/19 02:02 PM
      New Article: ARM Goes 64-bitAnon2012/08/19 07:16 PM
      New Article: ARM Goes 64-bitSteve2012/08/30 07:51 AM
  Scalar vs Vector registersRobert David Graham2012/08/19 05:19 PM
    Scalar vs Vector registersDavid Kanter2012/08/19 05:29 PM
  New Article: ARM Goes 64-bitBaserock ARM servers2012/08/21 04:13 PM
    Baserock ARM serversSysanon2012/08/21 04:14 PM
    A-15 virtualization and LPAE?Paul A. Clayton2012/08/21 06:13 PM
      A-15 virtualization and LPAE?Anon2012/08/21 07:13 PM
        Half-depth advantages?Paul A. Clayton2012/08/21 08:42 PM
          Half-depth advantages?Anon2012/08/22 03:33 PM
            Thanks for the information (NT)Paul A. Clayton2012/08/22 04:04 PM
      A-15 virtualization and LPAE?C. Ladisch2012/08/23 11:12 AM
        A-15 virtualization and LPAE?Paul2012/08/23 03:17 PM
        Excessive pessimismPaul A. Clayton2012/08/23 04:08 PM
          Excessive pessimismDavid Kanter2012/08/23 05:05 PM
    New Article: ARM Goes 64-bitMichael S2012/08/22 07:12 AM
      BTW, Baserock==product, Codethink==company (NT)Paul A. Clayton2012/08/22 08:56 AM
  New Article: ARM Goes 64-bitReinoud Zandijk2012/08/21 11:27 PM
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