Brute force seems to work

Article: ARM Goes 64-bit
By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), August 17, 2012 10:08 am
Room: Moderated Discussions
bakaneko (nyan.delete@this.hyan.wan) on August 17, 2012 8:37 am wrote:
[snip]
> How do the reorder buffer and rename table survive all
> that hammering on them anyway? You have given a few possible
> ideas to mitigate the issue, but does that mean that they
> are completely bottlenecked and can't? (2-4 new
> instructions, multiple finished instructions, optional
> instruction rewriting)

I receive the impression that the RAT is just handled by brute force techniques. With only 16 (or even 32) entries of 7 or 8 bits each, having 8 or 12 read ports and 4 write ports (to handle renaming for four instructions) may not be so bad. (FP/SIMD register renaming is somewhat separate.)

(One could also imagine using duplication [like the Alpha 21264 did for its GPR file] to reduce the number of read ports per array. [A duplicated array might also use different banking such that a bank conflict in one array is unlikely to be a bank conflict in the other.] With a smaller structure, it might be practical to use read-write ports with half-cycle accesses, like the register files on some early RISC processors.)

A single-thread ROB that does not store register data has a regular access pattern (FIFO-ish [replays that are dropped from the issue queues may read from the ROB "OoO"]). (For multithreading support one might carve the ROB into blocks, this would still allow perfect conflict avoidance for writing new instructions into the ROB.) The issue queues seem (to me) to be a more challenging matter in terms of increasing ILP and increasing capacity (issue window).

With the memory wall (and power wall), targeting very high ILP at high frequency seems less worthwhile.

However, I am extremely ignorant about the hardware details (I have read stuff here and at some other web sites and on comp.arch and have read some academic papers, but I mostly look at and think about more general ideas, relying on a general sense of costs.); answering your questions would seem to require someone with more knowledge of actual current design techniques and technological constraints.
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New Article: ARM Goes 64-bitDavid Kanter2012/08/14 12:04 AM
  New Article: ARM Goes 64-bitnone2012/08/14 12:44 AM
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          MWAIT not specifically MTEduardoS2012/08/15 03:16 PM
        MONITOR/MWAITanonymou52012/08/14 11:07 AM
          MONITOR/MWAITEduardoS2012/08/15 03:20 PM
      MIPS MT-ASErwessel2012/08/14 10:14 AM
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          New Article: ARM Goes 64-bitnone2012/08/14 05:40 AM
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              New Article: ARM Goes 64-bitnone2012/08/14 06:25 AM
                Predicated ld/store are usefulPaul A. Clayton2012/08/14 06:48 AM
                  Predicated ld/store are usefulnone2012/08/14 06:56 AM
                    Predicated ld/store are usefulanon2012/08/14 07:07 AM
                    Predicated stores might not be that badPaul A. Clayton2012/08/14 07:27 AM
                      Predicated stores might not be that badDavid Kanter2012/08/15 01:14 AM
                        Predicated stores might not be that badMichael S2012/08/15 11:41 AM
                        Predicated stores might not be that badR Byron2012/08/17 04:09 AM
                New Article: ARM Goes 64-bitanon2012/08/14 06:54 AM
                  New Article: ARM Goes 64-bitnone2012/08/14 07:04 AM
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            New Article: ARM Goes 64-bitanon2012/08/14 06:20 AM
              New Article: ARM Goes 64-bitnone2012/08/14 06:29 AM
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          OT: Conrad's "Youth"Richard Cownie2012/08/14 07:20 AM
      New Article: ARM Goes 64-bitEduardoS2012/08/14 06:04 AM
        New Article: ARM Goes 64-bitmpx2012/08/14 08:59 AM
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                Downloading µarch-specific binaries?Paul A. Clayton2012/11/19 11:21 AM
                New Article: ARM Goes 64-bitEduardoS2012/11/19 11:41 AM
                  New Article: ARM Goes 64-bitWilco2012/11/21 07:44 AM
                    JIT vs. static compilation (Was: New Article: ARM Goes 64-bit)VMguy2012/11/22 03:21 AM
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                                      Amazing!EduardoS2012/11/28 07:25 PM
                                        Amazing! (non-italic response)EduardoS2012/11/28 07:25 PM
                                        Amazing!EBFE2012/11/28 08:20 PM
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                    New Article: ARM Goes 64-bitDavid Kanter2012/11/21 10:12 AM
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                      A JIT exampleWilco2012/11/21 07:04 PM
                        A JIT examplerwessel2012/11/21 09:05 PM
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                        A JIT exampleEduardoS2012/11/23 10:13 AM
                          A JIT exampleWilco2012/11/23 01:41 PM
                            A JIT exampleEduardoS2012/11/23 02:06 PM
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    New Article: ARM Goes 64-bitDavid Kanter2012/08/14 09:11 AM
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  Minor suggested correctionPaul A. Clayton2012/08/14 08:33 AM
    Minor suggested correctionanon2012/08/14 08:57 AM
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    New Article: ARM Goes 64-bitDavid Kanter2012/08/14 09:16 AM
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    Number of GPRsExophase2012/08/16 02:52 PM
      Number of GPRsKenneth Jonsson2012/08/17 02:41 AM
        Ooops, missing link...Kenneth Jonsson2012/08/17 02:44 AM
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          64-bit pointers eat some performancebakaneko2012/08/17 08:37 AM
            Brute force seems to workPaul A. Clayton2012/08/17 10:08 AM
              Brute force seems to workbakaneko2012/08/17 11:15 AM
          64-bit pointers eat some performanceRichard Cownie2012/08/17 08:46 AM
            Pointer compression is atypicalPaul A. Clayton2012/08/17 10:43 AM
              Pointer compression is atypicalRichard Cownie2012/08/17 12:57 PM
                Pointer compression is atypicalHoward Chu2012/08/22 10:17 PM
                  Pointer compression is atypicalRichard Cownie2012/08/23 04:48 AM
                    Pointer compression is atypicalHoward Chu2012/08/23 06:51 AM
              Pointer compression is atypicalWilco2012/08/17 02:41 PM
                Pointer compression is atypicalRichard Cownie2012/08/17 04:13 PM
                  Pointer compression is atypicalRicardo B2012/08/19 10:44 AM
                  Pointer compression is atypicalHoward Chu2012/08/22 10:08 PM
                    Unified libraries?Paul A. Clayton2012/08/23 07:49 AM
                    Pointer compression is atypicalRichard Cownie2012/08/23 08:44 AM
                      Pointer compression is atypicalHoward Chu2012/08/23 05:17 PM
                        Pointer compression is atypicalanon2012/08/23 08:15 PM
                          Pointer compression is atypicalHoward Chu2012/08/23 09:33 PM
            64-bit pointers eat some performanceFoo_2012/08/18 12:09 PM
              64-bit pointers eat some performanceRichard Cownie2012/08/18 05:25 PM
                64-bit pointers eat some performanceRichard Cownie2012/08/18 05:32 PM
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          Number of GPRsKenneth Jonsson2012/08/17 11:54 AM
            Number of GPRsExophase2012/08/17 12:44 PM
              Number of GPRsKenneth Jonsson2012/08/17 01:22 PM
                Number of GPRsWilco2012/08/17 02:53 PM
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            Compiler vs. assembly aliasing knowledge?Exophase2012/08/17 11:09 AM
            Compiler vs. assembly aliasing knowledge?anon2012/08/18 02:23 AM
              Compiler vs. assembly aliasing knowledge?Ricardo B2012/08/19 11:02 AM
                Compiler vs. assembly aliasing knowledge?anon2012/08/19 06:07 PM
                  Compiler vs. assembly aliasing knowledge?Ricardo B2012/08/19 07:26 PM
                    Compiler vs. assembly aliasing knowledge?anon2012/08/19 10:03 PM
                      Compiler vs. assembly aliasing knowledge?anon2012/08/20 01:59 AM
        Number of GPRsDavid Kanter2012/08/17 12:46 PM
          RAT issues as part of reason 1Paul A. Clayton2012/08/17 02:18 PM
        Number of GPRsname992012/11/17 06:37 PM
          Large ARFs increase renaming costPaul A. Clayton2012/11/17 09:23 PM
    Number of GPRsDavid Kanter2012/08/16 03:31 PM
    Number of GPRsRichard Cownie2012/08/16 05:17 PM
    32 GPRs ~2-3%Paul A. Clayton2012/08/16 06:27 PM
      Oops, Message-ID: aaed6e38-c7bd-467e-ba41-f40cf1020e5e@googlegroups.com (NT)Paul A. Clayton2012/08/16 06:29 PM
      32 GPRs ~2-3%Exophase2012/08/16 10:06 PM
        R31 as SP/zero is kind of neat (NT)Paul A. Clayton2012/08/17 06:23 AM
        32 GPRs ~2-3%rwessel2012/08/17 08:24 AM
          32 GPRs ~2-3%Exophase2012/08/17 09:16 AM
            32 GPRs ~2-3%Max2012/08/17 04:19 PM
      32 GPRs ~2-3%name992012/11/17 07:43 PM
    Number of GPRsmpx2012/08/17 01:11 AM
      Latency and powerPaul A. Clayton2012/08/17 06:54 AM
    Number of GPRsbakaneko2012/08/17 03:09 AM
  New Article: ARM Goes 64-bitSteve2012/08/17 02:12 PM
    New Article: ARM Goes 64-bitDavid Kanter2012/08/19 12:42 PM
      New Article: ARM Goes 64-bitDoug S2012/08/19 02:02 PM
      New Article: ARM Goes 64-bitAnon2012/08/19 07:16 PM
      New Article: ARM Goes 64-bitSteve2012/08/30 07:51 AM
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  New Article: ARM Goes 64-bitBaserock ARM servers2012/08/21 04:13 PM
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    A-15 virtualization and LPAE?Paul A. Clayton2012/08/21 06:13 PM
      A-15 virtualization and LPAE?Anon2012/08/21 07:13 PM
        Half-depth advantages?Paul A. Clayton2012/08/21 08:42 PM
          Half-depth advantages?Anon2012/08/22 03:33 PM
            Thanks for the information (NT)Paul A. Clayton2012/08/22 04:04 PM
      A-15 virtualization and LPAE?C. Ladisch2012/08/23 11:12 AM
        A-15 virtualization and LPAE?Paul2012/08/23 03:17 PM
        Excessive pessimismPaul A. Clayton2012/08/23 04:08 PM
          Excessive pessimismDavid Kanter2012/08/23 05:05 PM
    New Article: ARM Goes 64-bitMichael S2012/08/22 07:12 AM
      BTW, Baserock==product, Codethink==company (NT)Paul A. Clayton2012/08/22 08:56 AM
  New Article: ARM Goes 64-bitReinoud Zandijk2012/08/21 11:27 PM
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