Paul A. Clayton (paaronclayton.delete@this.gmail.com) on August 17, 2012 10:43 am wrote:

> Without special
> support in the ISA, pointer compression will
> cost some extra operations. (One
> could imagine an ISA that would perform partial loads for unaligned accesses--a
> bit like the early ARM processors except with sign or zero extension rather than
> rotation. This would make loading such pointers "free".) In addition, the
> programming language is not likely to support such easily. (With C++, one could
> presumably implement compressed pointers in much the same way one can implement
> smart pointers.)

IIRC most 64-bit architectures zero-extend a 32-bit load. That means you can use 32-bit pointers to access the first 4GB without any penalty at all. There is an effort to create an x32 ABI on x64 that does exactly that.

Wilco