Paul A. Clayton (paaronclayton.delete@this.gmail.com) on August 16, 2012 6:27 pm wrote:
> Kenneth Jonsson (kj.delete@this.localhost.org) on August 16, 2012 2:35 pm wrote:
> [snip]
> > More register does increase the cost of switching context, so unused
> > register cannot be a good thing.
> >
> > So what are the benefits of moving to 32
> > GPRs on ARMv8 from the current number of 16 (well 14 if one exclude PC and LR)?
>
(I vaguely recall some paper from IBM indicating that some FP workloads
> had loops with some register spilling due to register pressure even at 32 registers. If one uses the
> same fields for FP/SIMD and GPR register names, having a 5-bit field could be appropriate.)
>

Oh, FP is a COMPLETELY different issue, and the win for 32 registers is even higher.
To take two common kernels:

On something like x86, you really have to code an FFT as radix-2; on a PPC there are enough registers that you can code it as radix-8 without spilling. So one third the load/stores, a little less overhead; a lot less waiting around for ops to complete: maybe 50% to 100% faster than a radix-2 implementation, depending on how OoO your CPU is.

Secondly matrix multiplication. Of course any decent matrix multiplication coding is blocking at multiple levels, taking note of everything from TLB coverage to L2 to L1; but at the lowest level you will block to the number of registers, and once again more is better.