By: bakaneko (nyan.delete@this.hyan.wan), August 22, 2012 10:56 pm
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on August 22, 2012 3:45 pm wrote:
> Suppose you had a TX that required simultaneously
> accessing 5 variables that map to the same set. In a scheme that just used a
> 4-way L1, it would always fail. OTOH, the same TX would be able to succeed on a
> MOB-based implementation.
Thanks, now I get it. We look at TX very differently.
You think about how to eliminate the limits in hardware, I
care about how to use it in software under the guarantees
given. (And that leaves me with 1 cacheline and no nesting.)
It was hard to understand what you wanted to show in your
article. The introduction didn't mention the MOB as goal or
vs. a cache based implementation at all and I didn't see
your view ("We want bigger transactions because... 70 writes
is ideal").
Topic | Posted By | Date |
---|---|---|
Article: Haswell TM Alternatives | David Kanter | 2012/08/21 10:17 PM |
Article: Haswell TM Alternatives | Håkan Winbom | 2012/08/22 12:52 AM |
Article: Haswell TM Alternatives | David Kanter | 2012/08/22 02:06 AM |
Article: Haswell TM Alternatives | anon | 2012/08/22 09:46 AM |
Article: Haswell TM Alternatives | Linus Torvalds | 2012/08/22 10:16 AM |
Article: Haswell TM Alternatives | Doug S | 2012/08/24 09:34 AM |
AMD's ASF even more limited | Paul A. Clayton | 2012/08/22 10:20 AM |
AMD's ASF even more limited | Linus Torvalds | 2012/08/22 10:41 AM |
Compiler use of ll/sc? | Paul A. Clayton | 2012/08/28 10:28 AM |
Compiler use of ll/sc? | Linus Torvalds | 2012/09/08 01:58 PM |
Lock recognition? | Paul A. Clayton | 2012/09/10 02:17 PM |
Sorry, I was confused | Paul A. Clayton | 2012/09/13 11:56 AM |
Filter to detect store conflicts | Paul A. Clayton | 2012/08/22 10:19 AM |
Article: Haswell TM Alternatives | bakaneko | 2012/08/22 03:02 PM |
Article: Haswell TM Alternatives | David Kanter | 2012/08/22 03:45 PM |
Article: Haswell TM Alternatives | bakaneko | 2012/08/22 10:56 PM |
Cache line granularity? | Paul A. Clayton | 2012/08/28 10:28 AM |
Cache line granularity? | David Kanter | 2012/08/31 09:13 AM |
A looser definition might have advantages | Paul A. Clayton | 2012/09/01 07:29 AM |
Cache line granularity? | rwessel | 2012/08/31 08:54 PM |
Alpha load locked granularity | Paul A. Clayton | 2012/09/01 07:29 AM |
Alpha load locked granularity | anon | 2012/09/02 06:23 PM |
Alpha pages groups | Paul A. Clayton | 2012/09/03 05:16 AM |
An alternative implementation | Maynard Handley | 2012/11/20 10:52 PM |
An alternative implementation | bakaneko | 2012/11/21 06:52 AM |
Guarding unread values? | Paul A. Clayton | 2012/11/21 09:39 AM |
Guarding unread values? | bakaneko | 2012/11/21 12:25 PM |
TM granularity and versioning | Paul A. Clayton | 2012/11/21 09:27 AM |
TM granularity and versioning | Maynard Handley | 2012/11/21 11:52 AM |
Indeed, TM (and coherence) has devilish details (NT) | Paul A. Clayton | 2012/11/21 11:56 AM |