anon (anon.delete@this.anon.com) on September 2, 2012 6:23 pm wrote:
> Paul A. Clayton (paaronclayton.delete@this.gmail.com) on
> September 1, 2012 7:29 am wrote:
[snip]
>> (Of course, Alpha did eventually support 64 KiB base
>> pages.)
>
> Didn't Alpha always support 64 KB, in addition to 8 KB, 512
> KB, and 2 MB page sizes?

At least some of the Alpha documentation calls such larger translation units page groups (e.g., the 21264 Microprocessor Hardware Reference Manual: "with each entry able to map a single 8KB page or a group of 8, 64, or 512 8KB pages"--that would be 4 MiB not 2 MiB, by the way). (Note I did use "base pages" to avoid confusion.)

Looking at the 21064A data sheet, such seem to have been called large pages, but less variety was supported in the instruction translation buffer ("The first eight page table entries provide small page (8K byte) translations while the remaining four provide large page (4 MB) translations.") (The HRM also indicates that "superpages" were supported for OS use that directly mapped the entire physical address space [multiple times, presumably using modulo addressing--the 21164PC data sheet seems to confirm this].)

(The 21164PC data sheet seems a bit less consistent in terminology: "The buffer stores recently used instruction stream (Istream) address translations and protection information for pages ranging from 8KB to 512KB" but also "Each entry supports all four granularity hint-bit combinations, so that a single DTB entry can provide translation for up to 512 contiguously mapped, 8-KB pages.")