Instruction queue

Article: Intel's Haswell CPU Microarchitecture
By: David Kanter (dkanter.delete@this.realworldtech.com), November 16, 2012 12:23 pm
Room: Moderated Discussions
Felid (Felid.delete@this.mailinator.com) on November 15, 2012 2:15 pm wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on November 15, 2012 9:59 am wrote:
> > Felid (Felid.delete@this.maininator.com) on November 14, 2012 11:58 pm wrote:
> > > Intel's manual says, that the size of the instruction queue (IQ) in SB (and IB)
> > > still is 18 entries (per thread), not 20. Where did you get this new number?
> >
> > From Ronak Singhal.
> >
> > DK
>
> Conroe had 18. When did it changed to 20 — Nhm, SB or IB?

According to my discussions with Intel architects, the changes occurred in Sandy Bridge.

Actually one thing I've wondered is how the function of the IQ has changed. In theory, you don't need it for loops any more since you have the decoded uop queue. Moreover, anything that is contained in the IQ will be contained in the uop cache. So I'm curious whether the IQ is solely for decoupling now, or whether it still works as a loop cache.

Honestly, the relationship between those three structures (instruction queue, uop cache, decoded uop buffer) is relatively unclear. I'm guessing:

1. Small loops operate from the decoded uop buffer, without probing the uop cache or L1I
2. Medium instruction footprint code works from the uop cache
3. Larger footprint code works from the L1I
4. The IQ is largely for decoupling and removing bubbles from L1I fetches
5. The decoded uop buffer acts as a decoupling buffer that removes bubbles for decoded uops (whether from the uop cache or traditional decoding)

That seems like the most logical arrangement, but I've never had a detailed discussion with Intel on this particular topic yet.

DK
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TopicPosted ByDate
Haswell CPU article onlineDavid Kanter2012/11/13 03:43 PM
  Haswell CPU article onlineEric2012/11/13 04:10 PM
    Haswell CPU article onlinehobold2012/11/13 05:13 PM
      Haswell CPU article onlineRicardo B2012/11/13 06:09 PM
    Haswell CPU article onlineanonymou52012/11/13 05:44 PM
      Haswell CPU article onlinenone2012/11/14 03:40 AM
  Haswell CPU article onlinetarlinian2012/11/13 04:56 PM
    Fixed (NT)David Kanter2012/11/13 06:06 PM
      Haswell CPU article onlineJacob Marley2012/11/14 02:18 AM
  Haswell CPU article onlinerandomshinichi2012/11/14 02:53 AM
    LLC == Last Level Cache (usually L3) (NT)Paul A. Clayton2012/11/14 05:50 AM
    Haswell CPU article onlineJoe2012/11/14 10:38 AM
      LLC vs. L3 vs. L4David Kanter2012/11/14 11:09 AM
        LLC vs. L3 vs. L4; LLC = Link Layer ControllerRay2012/11/14 10:08 PM
          A pit there are only 17000 TLAs... (NT)EduardoS2012/11/15 03:14 AM
  Haswell CPU article onlineanon2012/11/14 05:10 AM
    Move elimination can be a µop fusionPaul A. Clayton2012/11/14 06:41 AM
      That should be "mov R10 <- R9"! (NT)Paul A. Clayton2012/11/14 06:43 AM
      Move elimination can be a µop fusionanon2012/11/14 07:25 AM
        It does avoid the scheduler (NT)Paul A. Clayton2012/11/14 08:47 AM
      Move elimination can be a µop fusionStubabe2012/11/14 01:43 PM
        Move elimination can be a µop fusionanon2012/11/14 09:33 PM
          Move elimination can be a µop fusionFelid2012/11/15 12:49 AM
            Move elimination can be a µop fusionanon2012/11/15 01:23 AM
              Move elimination can be a µop fusionStuart2012/11/15 05:04 AM
                Move elimination can be a µop fusionStubabe2012/11/15 05:14 AM
                  Move elimination can be a µop fusionanon2012/11/15 05:48 AM
                    Move elimination can be a µop fusionEduardoS2012/11/15 06:00 AM
                      Move elimination can be a µop fusionanon2012/11/15 06:14 AM
                        Move elimination can be a µop fusionEduardoS2012/11/15 06:21 AM
                          Move elimination can be a µop fusionanon2012/11/15 06:31 AM
                    Move elimination can be a µop fusionStubabe2012/11/15 11:38 AM
                      There can be only one dependencePaul A. Clayton2012/11/15 12:50 PM
                    Move elimination can be a µop fusionFelid2012/11/15 03:19 PM
                      Move elimination can be a µop fusionanon2012/11/16 04:07 AM
                        Move elimination can be a µop fusionFelid2012/11/16 07:43 PM
                  Move elimination can be a µop fusionFelid2012/11/15 02:50 PM
                    Move elimination can be a µop fusionFelid2012/11/15 03:03 PM
                      Correction!Felid2012/11/19 01:23 AM
                    Thanks, I wasn't aware of the change in SB. Good to know... (NT)Stubabe2012/11/15 03:43 PM
            Move fusion assumes adjacencyPaul A. Clayton2012/11/15 07:15 AM
              Move fusion assumes adjacencyFelid2012/11/15 02:40 PM
        Move elimination can be a µop fusionPatrick Chase2012/11/21 11:52 AM
          Move elimination can be a µop fusionPatrick Chase2012/11/21 12:12 PM
    Haswell CPU article onlineRicardo B2012/11/14 09:12 AM
  Haswell CPU article onlinegmb2012/11/14 08:28 AM
  Haswell CPU article onlineFelid2012/11/14 11:58 PM
    Haswell CPU article onlineDavid Kanter2012/11/15 09:59 AM
      Haswell CPU article onlineFelid2012/11/15 02:15 PM
        Instruction queueDavid Kanter2012/11/16 12:23 PM
          Instruction queueFelid2012/11/16 01:05 PM
  128-bit division unit?Eric Bron2012/11/16 04:57 AM
    128-bit division unit?David Kanter2012/11/16 08:59 AM
      128-bit division unit?Eric Bron2012/11/16 09:47 AM
        128-bit division unit?Felid2012/11/16 12:46 PM
          128-bit division unit?Eric Bron2012/11/16 01:24 PM
            128-bit division unit?Felid2012/11/16 07:19 PM
              128-bit division unit?Eric Bron2012/11/18 08:41 AM
            128-bit division unit?Michael S2012/11/17 12:50 PM
              128-bit division unit?Felid2012/11/17 01:44 PM
                128-bit division unit?Michael S2012/11/17 02:45 PM
                  128-bit division unit?Felid2012/11/17 05:49 PM
                    128-bit division unit?Michael S2012/11/17 06:56 PM
              128-bit division unit?Eric Bron2012/11/18 08:35 AM
  Haswell CPU article onlineJim F2012/11/18 09:45 AM
    Haswell CPU article onlineGabriele Svelto2012/11/18 12:52 PM
  Probable bottleneckLaurent Birtz2012/11/23 01:45 PM
    Probable bottleneckEduardoS2012/11/23 01:58 PM
      Probable bottleneckLaurent Birtz2012/11/24 10:10 AM
    Probable bottleneckStubabe2012/11/25 03:08 AM
      Probable bottleneckEduardoS2012/11/25 08:15 AM
        Probable bottleneckStubabe2012/11/28 04:36 PM
          Urgh. Post got mangled by LESS THAN signStubabe2012/11/28 04:41 PM
          Probable bottleneckLaurent Birtz2012/11/29 08:34 AM
  Haswell CPU article onlineMr. Camel2012/11/28 03:47 PM
    Haswell CPU article onlineEduardoS2012/11/28 04:06 PM
      Haswell CPU article onlineMr. Camel2012/11/28 07:23 PM
        Haswell CPU article onlineEduardoS2012/11/28 07:27 PM
          Haswell CPU article onlineMr. Camel2012/12/12 01:39 PM
            Much faster iGPU clock ...Mark Roulo2012/12/12 03:53 PM
              Much faster iGPU clock ...Exophase2012/12/12 11:46 PM
                Much faster iGPU clock ... or not :-)Mark Roulo2012/12/13 09:11 AM
                  Much faster iGPU clock ... or not :-)EduardoS2012/12/13 10:38 PM
                    Much faster iGPU clock ... or not :-)Michael S2012/12/14 05:33 AM
                      Much faster iGPU clock ... or not :-)EduardoS2012/12/14 07:06 AM
                        Much faster iGPU clock ... or not :-)Doug S2012/12/14 12:13 PM
                          Much faster iGPU clock ... or not :-)EduardoS2012/12/14 12:43 PM
                  Much faster iGPU clock ... or not :-)Mr. Camel2012/12/14 10:50 AM
              Much faster iGPU clock ...Michael S2012/12/13 02:44 AM
                Much faster iGPU clock ...Mark Roulo2012/12/13 09:09 AM
  Haswell CPU article onlineYang2012/12/09 08:28 PM
    possible spam bot? (NT)I.S.T.2012/12/10 03:40 PM
  CPU Crystal Well behavior w/ eGPU?Robert Williams2013/04/17 02:16 PM
    CPU Crystal Well behavior w/ eGPU?Nicolas Capens2013/04/17 03:30 PM
      CPU Crystal Well behavior w/ eGPU?RecessionCone2013/04/17 04:20 PM
        CPU Crystal Well behavior w/ eGPU?Robert Williams2013/04/17 07:37 PM
    CPU Crystal Well behavior w/ eGPU?Eric Bron2013/04/17 09:10 PM
  Haswell CPU article onlineSireesh2014/09/01 02:48 PM
    Haswell CPU article onlineMaynard Handley2014/09/01 03:51 PM
      Great postDavid Kanter2014/09/01 07:12 PM
      Thanks :)Alberto2014/09/02 01:42 AM
      Thanks (NT)Poindexter2014/09/02 09:31 AM
    Haswell CPU article onlineEduardoS2014/09/01 04:21 PM
  Haswell CPU article onlineAlbert2015/10/06 01:48 AM
    Haswell CPU article onlineMichael S2015/10/06 02:10 AM
    Haswell CPU article onlineSHK2015/10/06 03:51 AM
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