Probable bottleneck

Article: Intel's Haswell CPU Microarchitecture
By: Laurent Birtz (seerdecker.delete@this.yahoo.com.au), November 23, 2012 1:45 pm
Room: Moderated Discussions
Do you guys know if the 4 uops frontend/retirement limit is the probable bottleneck in Haswell for a typical integer work load, e.g. video encoding?

The way I see it, up to four simple arithmetic operations can be done concurrently (assuming 1 cycle per uop), and there can be concurrent load/stores, for a total of 6 uops/cycle processed in the execution units. For Nehalem, I used to consider the "mov" operations as mostly free since they could be done in another port while the two SSE ALUs were busy. Am I correct in believing that this assumption no longer holds true?

My reasoning is that although Haswell processes the "mov" uops in the renamer, those uops still need to be issued from the frontend (up to 4 per cycle), so every "mov" instruction has the potential of starving an execution unit of uops to execute. If that analysis is correct, then the "mov" instructions should generally be avoided in favor of 3-operands instructions and memory operands.

Thanks for any insight.
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TopicPosted ByDate
Haswell CPU article onlineDavid Kanter2012/11/13 03:43 PM
  Haswell CPU article onlineEric2012/11/13 04:10 PM
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    LLC == Last Level Cache (usually L3) (NT)Paul A. Clayton2012/11/14 05:50 AM
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      LLC vs. L3 vs. L4David Kanter2012/11/14 11:09 AM
        LLC vs. L3 vs. L4; LLC = Link Layer ControllerRay2012/11/14 10:08 PM
          A pit there are only 17000 TLAs... (NT)EduardoS2012/11/15 03:14 AM
  Haswell CPU article onlineanon2012/11/14 05:10 AM
    Move elimination can be a µop fusionPaul A. Clayton2012/11/14 06:41 AM
      That should be "mov R10 <- R9"! (NT)Paul A. Clayton2012/11/14 06:43 AM
      Move elimination can be a µop fusionanon2012/11/14 07:25 AM
        It does avoid the scheduler (NT)Paul A. Clayton2012/11/14 08:47 AM
      Move elimination can be a µop fusionStubabe2012/11/14 01:43 PM
        Move elimination can be a µop fusionanon2012/11/14 09:33 PM
          Move elimination can be a µop fusionFelid2012/11/15 12:49 AM
            Move elimination can be a µop fusionanon2012/11/15 01:23 AM
              Move elimination can be a µop fusionStuart2012/11/15 05:04 AM
                Move elimination can be a µop fusionStubabe2012/11/15 05:14 AM
                  Move elimination can be a µop fusionanon2012/11/15 05:48 AM
                    Move elimination can be a µop fusionEduardoS2012/11/15 06:00 AM
                      Move elimination can be a µop fusionanon2012/11/15 06:14 AM
                        Move elimination can be a µop fusionEduardoS2012/11/15 06:21 AM
                          Move elimination can be a µop fusionanon2012/11/15 06:31 AM
                    Move elimination can be a µop fusionStubabe2012/11/15 11:38 AM
                      There can be only one dependencePaul A. Clayton2012/11/15 12:50 PM
                    Move elimination can be a µop fusionFelid2012/11/15 03:19 PM
                      Move elimination can be a µop fusionanon2012/11/16 04:07 AM
                        Move elimination can be a µop fusionFelid2012/11/16 07:43 PM
                  Move elimination can be a µop fusionFelid2012/11/15 02:50 PM
                    Move elimination can be a µop fusionFelid2012/11/15 03:03 PM
                      Correction!Felid2012/11/19 01:23 AM
                    Thanks, I wasn't aware of the change in SB. Good to know... (NT)Stubabe2012/11/15 03:43 PM
            Move fusion assumes adjacencyPaul A. Clayton2012/11/15 07:15 AM
              Move fusion assumes adjacencyFelid2012/11/15 02:40 PM
        Move elimination can be a µop fusionPatrick Chase2012/11/21 11:52 AM
          Move elimination can be a µop fusionPatrick Chase2012/11/21 12:12 PM
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                128-bit division unit?Michael S2012/11/17 02:45 PM
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  Haswell CPU article onlineJim F2012/11/18 09:45 AM
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  Probable bottleneckLaurent Birtz2012/11/23 01:45 PM
    Probable bottleneckEduardoS2012/11/23 01:58 PM
      Probable bottleneckLaurent Birtz2012/11/24 10:10 AM
    Probable bottleneckStubabe2012/11/25 03:08 AM
      Probable bottleneckEduardoS2012/11/25 08:15 AM
        Probable bottleneckStubabe2012/11/28 04:36 PM
          Urgh. Post got mangled by LESS THAN signStubabe2012/11/28 04:41 PM
          Probable bottleneckLaurent Birtz2012/11/29 08:34 AM
  Haswell CPU article onlineMr. Camel2012/11/28 03:47 PM
    Haswell CPU article onlineEduardoS2012/11/28 04:06 PM
      Haswell CPU article onlineMr. Camel2012/11/28 07:23 PM
        Haswell CPU article onlineEduardoS2012/11/28 07:27 PM
          Haswell CPU article onlineMr. Camel2012/12/12 01:39 PM
            Much faster iGPU clock ...Mark Roulo2012/12/12 03:53 PM
              Much faster iGPU clock ...Exophase2012/12/12 11:46 PM
                Much faster iGPU clock ... or not :-)Mark Roulo2012/12/13 09:11 AM
                  Much faster iGPU clock ... or not :-)EduardoS2012/12/13 10:38 PM
                    Much faster iGPU clock ... or not :-)Michael S2012/12/14 05:33 AM
                      Much faster iGPU clock ... or not :-)EduardoS2012/12/14 07:06 AM
                        Much faster iGPU clock ... or not :-)Doug S2012/12/14 12:13 PM
                          Much faster iGPU clock ... or not :-)EduardoS2012/12/14 12:43 PM
                  Much faster iGPU clock ... or not :-)Mr. Camel2012/12/14 10:50 AM
              Much faster iGPU clock ...Michael S2012/12/13 02:44 AM
                Much faster iGPU clock ...Mark Roulo2012/12/13 09:09 AM
  Haswell CPU article onlineYang2012/12/09 08:28 PM
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      Great postDavid Kanter2014/09/01 07:12 PM
      Thanks :)Alberto2014/09/02 01:42 AM
      Thanks (NT)Poindexter2014/09/02 09:31 AM
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    Haswell CPU article onlineMichael S2015/10/06 02:10 AM
    Haswell CPU article onlineSHK2015/10/06 03:51 AM
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