By: Johan (firstname.lastname@example.org), February 1, 2013 12:40 am
Room: Moderated Discussions
> The one thing I can see that might change this would be for Intel to come up with
> a much better main-memory technology (and I guess die-stacking might be a possibility):
> but if everyone is stuck with the same DDR3/DDR4 standard, with the same number
> of pins and the same effective-bandwidth-per-pin, then they're all going to be in
> the same ballpark for server throughput, regardless of ISA and process-node
Memory bandwidth is the main bottleneck for serverapps throughput? Sorry, but that is a gross oversimplification. In the world of perfect prefetching maybe. But in the real world, prefetching is hardly perfect.
Many server apps hardly see any speedup if you use faster memory. The way that the CPU core hides memory latency has a big impact. That is exactly why a complex core like the Xeon E5 is capable of outperforming many other servers with a higher core count and the same or more bandwidth.