By: Patrick Chase (patrickjchase.delete@this.gmail.com), February 2, 2013 9:27 am
Room: Moderated Discussions
mpx (mpx.delete@this.nomail.pl) on February 2, 2013 4:31 am wrote:
> Doesn't BIG.Little architecture also represent a huge RISC advantage? Not only is the
> little part well-within the RISC-advantage group but also is it possible to do x86 that
> has a small and a large processor similar to each other bug-wise, so that programs are
> debuggable even though switching between cores of different architectures?
For *microservers*, which are the topic of this thread? I think not. Can you give an example of a realistic server workload for which BIG.little makes sense?
-- Patrick
> Doesn't BIG.Little architecture also represent a huge RISC advantage? Not only is the
> little part well-within the RISC-advantage group but also is it possible to do x86 that
> has a small and a large processor similar to each other bug-wise, so that programs are
> debuggable even though switching between cores of different architectures?
For *microservers*, which are the topic of this thread? I think not. Can you give an example of a realistic server workload for which BIG.little makes sense?
-- Patrick