By: rwessel (robertwessel.delete@this.yahoo.com), February 4, 2013 12:28 am
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on February 3, 2013 9:52 pm wrote:
> Patrick Chase (patrickjchase.delete@this.gmail.com) on February 3, 2013 8:05 pm wrote:
> > anon (anon.delete@this.anon.com) on February 3, 2013 6:08 pm
> > wrote:> From your initial post I replied to, you wrote:
> > >
> > > > I think that the statement that x86 takes 5-15% more area than RISC is a bit simplistic,
> > > > because the penalty is highly variable depending on what performance level you're
> > > > targeting and what sort of microarchitecture you have to use to get there.
> > > >
> > > > As a simple example, x86 is utterly noncompetitive at the area/performance/power levels of, say, a Cortex
> > > > M1/M3/M4 or even an R4.
> > > [...]
> > > > The "x86 penalty" becomes fairly trivial once you get
> > > > up to full-blown out-of-order Tomasulo machines and the like.
> > >
> > > So you seemed to be implying that at P6 level, x86 penalty was much smaller.
> >
> > I was implying that the penalty was vastly smaller than it is in the two cases (R3000 parity, A8 parity)
> > that I had addressed in the previous paragraph. I believe
> > I said "nontrivial integer factors" (i.e. hundreds
> > of percent) in the area/performance regime where the RISCs would employ a classic 5-stage pipe, so clearly
> > I was arguing that David's estimate was *low* by an order of magnitude in that case.
> >
> > In this sort of thing a 5-15% area difference really is low enough that other factors (ecosystem
> > etc) dominate. That makes it a practically trivial difference. The obvious exception would be
> > the case where most of the other factors are neutralized, for example AMD vs Intel.
>
> > Well to start with, let's just avoid the word "trivial". If you say it was 15% for the P6. Then would that mean
> > similar difference for CPUs competing in today's 3-issue medium-depth (A15 class) performance range? In that
> > case, for the ARM market share I think 15% is a very big difference. If you could make the CPUs for 15% cheaper
> > than competitor, you would take their market (or have much higher margins at the same market share).
The problem is that 15% advantage at the end of the fab line immediately starts to dilute. As soon as you have to saw the dies apart, test and package them, sell them, buy motherboards to install them in, etc., etc., etc., down to the pointer where someone is going to buy a system with one of these things in it, install an OS and applications on it, and all that stuff, you'll have little more than noise. And when this is supposed to be an impetus for a (very expensive) platform transition - you're going to need a lot more than noise. And ultimately, this fails unless you get someone to buy the thing at the end of the day.
> Patrick Chase (patrickjchase.delete@this.gmail.com) on February 3, 2013 8:05 pm wrote:
> > anon (anon.delete@this.anon.com) on February 3, 2013 6:08 pm
> > wrote:> From your initial post I replied to, you wrote:
> > >
> > > > I think that the statement that x86 takes 5-15% more area than RISC is a bit simplistic,
> > > > because the penalty is highly variable depending on what performance level you're
> > > > targeting and what sort of microarchitecture you have to use to get there.
> > > >
> > > > As a simple example, x86 is utterly noncompetitive at the area/performance/power levels of, say, a Cortex
> > > > M1/M3/M4 or even an R4.
> > > [...]
> > > > The "x86 penalty" becomes fairly trivial once you get
> > > > up to full-blown out-of-order Tomasulo machines and the like.
> > >
> > > So you seemed to be implying that at P6 level, x86 penalty was much smaller.
> >
> > I was implying that the penalty was vastly smaller than it is in the two cases (R3000 parity, A8 parity)
> > that I had addressed in the previous paragraph. I believe
> > I said "nontrivial integer factors" (i.e. hundreds
> > of percent) in the area/performance regime where the RISCs would employ a classic 5-stage pipe, so clearly
> > I was arguing that David's estimate was *low* by an order of magnitude in that case.
> >
> > In this sort of thing a 5-15% area difference really is low enough that other factors (ecosystem
> > etc) dominate. That makes it a practically trivial difference. The obvious exception would be
> > the case where most of the other factors are neutralized, for example AMD vs Intel.
>
> > Well to start with, let's just avoid the word "trivial". If you say it was 15% for the P6. Then would that mean
> > similar difference for CPUs competing in today's 3-issue medium-depth (A15 class) performance range? In that
> > case, for the ARM market share I think 15% is a very big difference. If you could make the CPUs for 15% cheaper
> > than competitor, you would take their market (or have much higher margins at the same market share).
The problem is that 15% advantage at the end of the fab line immediately starts to dilute. As soon as you have to saw the dies apart, test and package them, sell them, buy motherboards to install them in, etc., etc., etc., down to the pointer where someone is going to buy a system with one of these things in it, install an OS and applications on it, and all that stuff, you'll have little more than noise. And when this is supposed to be an impetus for a (very expensive) platform transition - you're going to need a lot more than noise. And ultimately, this fails unless you get someone to buy the thing at the end of the day.