> > Continued reliance on condition flags.
>
> What is cleaner? GPR for comparison/branch?

Compare and NOPify: there is a a permanent eight (or four or ...) bits mask associated with the next eight (or four or ...) instructions to execute (in the pipeline), and each following assembly instruction can be replaced by a NOP (No OPeration) at any time - in the pipeline only.
So you have test instructions like:
if (R5 < R2) replace by NOP the next assembly instruction (in the pipeline only).
if (R1 == R2) replace by NOP the following and the third following assembly instruction.
At first, the compiler can just put jumps in the instruction which may be NOPed, but a more clever compiler would also put other comparisons or anything else.
The bit mask of assembly instructions to replace by NOP is obviously shifted by one each times the processor execute the next instruction (even NOP), and instructions are not by default replaced by NOP.

If anybody think of setting a patent on this one, the inventor name is "etienne_lorrain@yahoo.fr"...

Probably the bit mask of assembly instructions to replace by NOP would still be valid after jumps (i.e. instructions still not in the pipeline can be NOPed), and a move-to-register replaced by NOP may have side effect like reading the memory, but the register would not be updated.

Etienne.