Michael S (already5chosen.delete@this.yahoo.com) on February 4, 2013 7:55 am wrote:
> none (none.delete@this.none.com) on February 4, 2013 3:03 am wrote:
> >
> > And there also is the validation nightmare that this increased complexity requires.
> > As an example, microcode was mentioned in another thread as something quite complex.
>
> That's the only argument that does not sound bogus.

Small teams (by today's standards) were microcoding ISAs that are considerably more complex than x86 (VAX, 68k, etc) all the way back in the late 70s. I suspect that if you ask a currently active CPU architect they'll tell you that HW implementation of an ISA is vastly harder. The issue with microcode is performance.

> But, then again, out of the group consisting of Power, SPARC, ARM/ARM64 and IPF I have troubles
> picking one that will serve as a poster child for architectural simplicity :-)

Out of that group, AArch64 wins the "simplicity" prize by a mile IMO. Throw MIPS and Alpha in and there's more of a discussion.

-- Patrick