anon (anon.delete@this.anon.com) on February 3, 2013 10:06 pm wrote:
> Patrick Chase (patrickjchase.delete@this.gmail.com) on February 3, 2013 7:40 pm wrote:
> > anon (anon.delete@this.anon.com) on February 3, 2013 6:11 pm wrote:
> > > Patrick Chase (patrickjchase.delete@this.gmail.com) on February 3, 2013 4:29 pm wrote:
> > > > Paul A. Clayton (paaronclayton.delete@this.gmail.com) on February 2, 2013 11:10 am wrote:
> > >
> > > > > A clean RISC like Alpha (or--from what I have read--AArch64) would be much more friendly to fast bring-up
> > > > > of a decent microarchitecture. (Classic ARM seems to be somewhere in the middle--not as complex as x86 but
> > > > > not as simple as Alpha--, but even with Thumb2+classic ARM it might be closer to Alpha than to x86.)
> > > >
> > > > AArch64 is indeed a nice, classic RISC architecture. In particular they fixed the biggest
> > > > single limitation of classic ARM (spending instruction encoding bits on condition-based
> > > > predication at the expense of GPRs). I'd put it somewhere between MIPS and Alpha on
> > > > the "architectural purity scale", and that's a pretty good place to be.
> > >
> > > What are some aspects of the ISA that make it less clean than Alpha, would you say?
>
> Thanks for the answer.
>
> >
> > Continued reliance on condition flags.
>
> What is cleaner? GPR for comparison/branch?

The right solution is what it has always been --- the PPC/POWER solution.
(a) Multiple condition registers.
(b) Most instructions come in two variants, one of which sets conditions, one of which does not.
(c) Compares can choose which condition register to modify.

I'd be willing to give up (b) (so that no instructions except cpmpares modify the condition registers) if it's considered too much hassle (eg has to be cracked into micro-ops) but it is really convenient and helps quite a bit with instruction bandwidth.

I'd also add one thing which wasn't in original POWER/PPC which is predicated moves. I can live without general predication, but a predicated move from registerA to registerB is SO convenient and saves so many stupid little pipeline bubbles.