By: TREZA (no.delete@this.ema.il), February 15, 2013 4:21 am
Room: Moderated Discussions
I guess that it is one thing that SPARCs did right : One set of NZVC flags, always updated together and only by specific instructions (ADD versus ADDcc, AND vs ANDcc) so that an architecture can be fast for non updating instructions and use delayed flag updates and speculated branches.
The PowerPC is interesting for features beyond simple flags : There is a count register (CTR) managed separately from the GPRs (by the "branch unit") and "decrement and conditionally branch" opcodes. Being separate, the count register effects can be more easily anticipated.
The PowerPC is interesting for features beyond simple flags : There is a count register (CTR) managed separately from the GPRs (by the "branch unit") and "decrement and conditionally branch" opcodes. Being separate, the count register effects can be more easily anticipated.