By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), February 18, 2013 1:30 pm
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on February 18, 2013 2:05 am wrote:
[snip]
> On the other hand, I suspect quite a lot of branches will be unsuitable. And shuffling code
> around so that "something" gets done in between the comparison and the branch has the obvious
> flaw that it's effectively just putting the same kind of speculative work into the bubble.
>
> Are you aware of any papers that study this in isolation?
No. I generally do not look much at compiler papers and my Google-fu is weak. I would not be surprised if some of the work related to EPIC might address such issues, but most of that work would probably assume that unnecessary work was extremely inexpensive. (I think AT&T's CRISP/Hobbit benefited from early resolution of the branch condition [single one-bit branch register, IIRC], but I do not remember much being mentioned about sophisticated compiler scheduling.)
Since multiple condition/predicate registers are not the common case for GPR-based branches (both in terms of ISA count and in terms of processors manufactured), I suspect there is relatively little publicly available research on early setting of condition/predicate registers; but that is just a wild guess.
Perhaps someone more skilled in searching or more familiar with compiler research could provide a better answer.
[snip]
> On the other hand, I suspect quite a lot of branches will be unsuitable. And shuffling code
> around so that "something" gets done in between the comparison and the branch has the obvious
> flaw that it's effectively just putting the same kind of speculative work into the bubble.
>
> Are you aware of any papers that study this in isolation?
No. I generally do not look much at compiler papers and my Google-fu is weak. I would not be surprised if some of the work related to EPIC might address such issues, but most of that work would probably assume that unnecessary work was extremely inexpensive. (I think AT&T's CRISP/Hobbit benefited from early resolution of the branch condition [single one-bit branch register, IIRC], but I do not remember much being mentioned about sophisticated compiler scheduling.)
Since multiple condition/predicate registers are not the common case for GPR-based branches (both in terms of ISA count and in terms of processors manufactured), I suspect there is relatively little publicly available research on early setting of condition/predicate registers; but that is just a wild guess.
Perhaps someone more skilled in searching or more familiar with compiler research could provide a better answer.
