Seni (seniike.delete@this.hotmail.com) on February 14, 2013 7:45 am wrote:
> the CLEANEST solution is the one where none of the mess is exposed.
> Flags and condition registers are nothing but mess.
> The compare and branch should be done together in the same
> intruction and the intermediate results never stored.
>
> Like this:
>
> JL - Jump if Less
>
> JL dest, reg1, reg2
>
> Jumps to displacement dest if value in reg1 is less than value in reg2
>
>
> So you don't need a second register file just for condition registers, nor special mov
> instructions to touch that register file, nor a special renamer for it. You also reduce
> the number of instructions to be executed by one per branch, and eliminate two expensive
> register file accesses - one to write the condition code and one to read it back.
>

Seems that the NIOS soft processor (which is part of an FPGA) is of this kind,
no trace of a flag register. No register renaming nor OoO there, wrong application domain.
http://www.altera.com/literature/hb/nios2/n2cpu_nii5v1.pdf
See "Chapter 8: Instruction Set Reference", docs of "add" assembly instruction.