By: David Kanter (dkanter.delete@this.realworldtech.com), April 29, 2013 12:08 am
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on April 23, 2013 8:14 am wrote:
> I just posted a new article online:
>
> Graphics is a focal point of the upcoming Haswell platform, necessitating a high bandwidth memory
> solution. To deliver high performance Intel is returning to the DRAM market, which it exited in
> 1985. The memory that ships with Haswell will be a custom embedded DRAM mounted in the package and
> manufactured on a variant of Intel’s 22nm process. By avoiding the commodity memory market, Intel
> will preserve high margins by cannibalizing discrete GPUs and dedicated graphics memory.
>
> http://www.realworldtech.com/intel-dram/
>
> As always, I encourage discussion, so let the fun begin!
>
> David
In the last week or so, several sources have suggested that my initial analysis was partially incorrect. Rather than using a wide and slow interface for Haswell's eDRAM (e.g., 512-bit @ 1GT/s), it will be a narrow and fast interface. Sources also suggested that the bandwidth estimate was a bit low.
I don't have any specific details, but the bandwidth estimate is probably accurate to 20-30%. it's probably safe to assume significantly faster than DDR3 specs (so figure >2.5GT/s).
Overall though, mostly correct.
David
> I just posted a new article online:
>
> Graphics is a focal point of the upcoming Haswell platform, necessitating a high bandwidth memory
> solution. To deliver high performance Intel is returning to the DRAM market, which it exited in
> 1985. The memory that ships with Haswell will be a custom embedded DRAM mounted in the package and
> manufactured on a variant of Intel’s 22nm process. By avoiding the commodity memory market, Intel
> will preserve high margins by cannibalizing discrete GPUs and dedicated graphics memory.
>
> http://www.realworldtech.com/intel-dram/
>
> As always, I encourage discussion, so let the fun begin!
>
> David
In the last week or so, several sources have suggested that my initial analysis was partially incorrect. Rather than using a wide and slow interface for Haswell's eDRAM (e.g., 512-bit @ 1GT/s), it will be a narrow and fast interface. Sources also suggested that the bandwidth estimate was a bit low.
I don't have any specific details, but the bandwidth estimate is probably accurate to 20-30%. it's probably safe to assume significantly faster than DDR3 specs (so figure >2.5GT/s).
Overall though, mostly correct.
David