By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), May 7, 2013 7:18 am
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on May 7, 2013 4:53 am wrote:
[snip]
> I'm surprised there does not seem to be mention of any kind of cached decode work. It does not
> seem like there is a decoded instruction cache or loop buffer of any form (or can the instruction
> queue act as a loop buffer?). Is there any pre-decoding going on in the L1 icache?
On page 2 it is stated that each block in the Icache "also caches pre-decode bits for previously decoded instructions". This might be just a single end- or start-of-instruction marker bit per byte. (Marking the end of an instruction allows determining [speculating that the predecode information is correct--it could be wrong if a jump is made into the middle of a previously decoded instruction] that the last byte ends an instruction and the start of the first instruction is known from instruction target address and can be determined by looking at the end marker for the previous byte.)
Details about what predecode information is stored and how it is used tend (it seems) not to be publicly revealed, but the one-bit per byte instruction boundary marking mechanism is a fairly standard use of predecoding for x86.
[snip]
> I'm surprised there does not seem to be mention of any kind of cached decode work. It does not
> seem like there is a decoded instruction cache or loop buffer of any form (or can the instruction
> queue act as a loop buffer?). Is there any pre-decoding going on in the L1 icache?
On page 2 it is stated that each block in the Icache "also caches pre-decode bits for previously decoded instructions". This might be just a single end- or start-of-instruction marker bit per byte. (Marking the end of an instruction allows determining [speculating that the predecode information is correct--it could be wrong if a jump is made into the middle of a previously decoded instruction] that the last byte ends an instruction and the start of the first instruction is known from instruction target address and can be determined by looking at the end marker for the previous byte.)
Details about what predecode information is stored and how it is used tend (it seems) not to be publicly revealed, but the one-bit per byte instruction boundary marking mechanism is a fairly standard use of predecoding for x86.