By: mpx (mpx.delete@this.nomail.pl), May 10, 2013 11:51 pm
Room: Moderated Discussions
Brett (ggtgp.delete@this.yahoo.com) on May 9, 2013 8:26 pm wrote:
> The last thing you want is to have
> a critical path task slowed down
SPARC T4 is 8-way SMT by default, but can dynamically switch to max-ipc threading mode, in which only one thread runs on a core, thus having all it's resources available. Such mode is available via Critical Thread API available on Solaris.
So what you see as a problem is in fact a solved case. Of course Google would have to introduce something similar to Android in order to make 8-way SMT viable there. Right now Android is optimized for 1 thread/core ARM cores, so it makes sense for Intel to create similar architecture in hardware.
> The last thing you want is to have
> a critical path task slowed down
SPARC T4 is 8-way SMT by default, but can dynamically switch to max-ipc threading mode, in which only one thread runs on a core, thus having all it's resources available. Such mode is available via Critical Thread API available on Solaris.
So what you see as a problem is in fact a solved case. Of course Google would have to introduce something similar to Android in order to make 8-way SMT viable there. Right now Android is optimized for 1 thread/core ARM cores, so it makes sense for Intel to create similar architecture in hardware.
