By: Michael S (already5chosen.delete@this.yahoo.com), May 19, 2013 5:42 am
Room: Moderated Discussions
Klimax (danklima.delete@this.gmail.com) on May 19, 2013 4:36 am wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on May 19, 2013 4:02 am wrote:
> > Klimax (danklima.delete@this.gmail.com) on May 19, 2013 2:34 am wrote:
> > > EduardoS (no.delete@this.spam.com) on May 19, 2013 12:20 am wrote:
> > > > Klimax (danklima.delete@this.gmail.com) on May 18, 2013 11:04 pm wrote:
> > > > > A few years can change quite few things, like process node or available structures for OOO core.
> > > >
> > > > While true I don't think this is the case here, in both reasons (first for going in order then for going
> > > > out of order) I think Intel wasn't willing to talk about design decisions and just give a random excuse.
> > > >
> > >
> > > Anandtech mentioned back then size and cost:
> > > http://www.anandtech.com/show/2449/2
> > > "In order to eventually compete in the ARM-space, Silverthorne has to be small and very cheap. The
> > > CPU itself is incredibly small thanks to its paltry 47M transistor count contributing to a die that's
> > > only 25 mm^2. Intel kept Silverthorne's die size small by greatly simplifying its architecture."
> > >
> >
> > Did Anand really said that 47M transistors are "incredibly small"?
> > It sounds so funny that it isn't even funny.
> >
>
> First paragraph in the link.
> And then ???. Mind being bit more specific, what is wrong? (Also I am sure that it was
> in relation to rest of x86 cores be it Intel's, AMD's or VIA's, not Arm/MIPS cores)
For core+L1 caches alone 47M is a huge number. Hopefully, they included L2 cache.
But when you include L2 cache, the # of transistors is no more interested.
To put this numbers in perspective, Pentium-II with integrated 256KB L2 cache was estimated to have 27.4M transistors. Pentium-III, also with 256KB L2 - 28M transistors.
Pentium-4 (Wmt), also with 256KB L2 - 42M transistors, and it was considered unusually huge.
AMD K7 (Thunderbird), also with 256KB L2, contained 37M transistors, but that included very big L1D and L1I caches.
As to VIA C3/C7 cores, I had never seen their number of transistors published, but their physical size was always significantly smaller than "fat" Intel/AMD cores on the same silicon process node.
So, estimating the difference between 256MB of L2 in all "fat" cores mentioned above, and 512MB L2 of Silverthorne as 15M transistors, Silverthorne core+L1 ends up bigger than Pentium-III and only slightly smaller than K7, despite much bigger L2 of the later.
Summary:
Measured by transistor count, Silverthorne is the biggest in-order x86 core by far, comparable in size or bigger than quite a few OoO x86 cores. However, I believe that it's not the biggest in-order CPU core ever made, IBM Power6 and z10 are likely bigger, but I don't know the numbers.
> Michael S (already5chosen.delete@this.yahoo.com) on May 19, 2013 4:02 am wrote:
> > Klimax (danklima.delete@this.gmail.com) on May 19, 2013 2:34 am wrote:
> > > EduardoS (no.delete@this.spam.com) on May 19, 2013 12:20 am wrote:
> > > > Klimax (danklima.delete@this.gmail.com) on May 18, 2013 11:04 pm wrote:
> > > > > A few years can change quite few things, like process node or available structures for OOO core.
> > > >
> > > > While true I don't think this is the case here, in both reasons (first for going in order then for going
> > > > out of order) I think Intel wasn't willing to talk about design decisions and just give a random excuse.
> > > >
> > >
> > > Anandtech mentioned back then size and cost:
> > > http://www.anandtech.com/show/2449/2
> > > "In order to eventually compete in the ARM-space, Silverthorne has to be small and very cheap. The
> > > CPU itself is incredibly small thanks to its paltry 47M transistor count contributing to a die that's
> > > only 25 mm^2. Intel kept Silverthorne's die size small by greatly simplifying its architecture."
> > >
> >
> > Did Anand really said that 47M transistors are "incredibly small"?
> > It sounds so funny that it isn't even funny.
> >
>
> First paragraph in the link.
> And then ???. Mind being bit more specific, what is wrong? (Also I am sure that it was
> in relation to rest of x86 cores be it Intel's, AMD's or VIA's, not Arm/MIPS cores)
For core+L1 caches alone 47M is a huge number. Hopefully, they included L2 cache.
But when you include L2 cache, the # of transistors is no more interested.
To put this numbers in perspective, Pentium-II with integrated 256KB L2 cache was estimated to have 27.4M transistors. Pentium-III, also with 256KB L2 - 28M transistors.
Pentium-4 (Wmt), also with 256KB L2 - 42M transistors, and it was considered unusually huge.
AMD K7 (Thunderbird), also with 256KB L2, contained 37M transistors, but that included very big L1D and L1I caches.
As to VIA C3/C7 cores, I had never seen their number of transistors published, but their physical size was always significantly smaller than "fat" Intel/AMD cores on the same silicon process node.
So, estimating the difference between 256MB of L2 in all "fat" cores mentioned above, and 512MB L2 of Silverthorne as 15M transistors, Silverthorne core+L1 ends up bigger than Pentium-III and only slightly smaller than K7, despite much bigger L2 of the later.
Summary:
Measured by transistor count, Silverthorne is the biggest in-order x86 core by far, comparable in size or bigger than quite a few OoO x86 cores. However, I believe that it's not the biggest in-order CPU core ever made, IBM Power6 and z10 are likely bigger, but I don't know the numbers.