David Kanter (dkanter.delete@this.realworldtech.com) on May 6, 2013 2:30 pm wrote:
> Silvermont is Intel’s first CPU core tailored for power efficient applications such as smartphones,
> tablets, and microservers. The 22nm microarchitecture features updated instruction set extensions,
> full out-of-order execution with a tightly coupled L2 cache, aggressive power management, and a new
> high performance SoC fabric. These enhancements deliver tremendous performance and frequency gains
> over the aging Atom core, putting Intel’s mobile strategy in a more competitive position.
>
> My detailed look at the microarchitecture is online: http://www.realworldtech.com/silvermont/
>
> Comments and questions are welcome, let the discussion begin!
>
> David

I have a question;

If Silvermont uses RSV banks for every execution unit function, and the execution units simply "sucks" in the next instruction to execute as the previous one is finished, what is there to prevent dependancy errors? Sorry, I'm quite a bit new to CPU architecture and want to learn lots, so I apologize if this is a very newbish question.