Silvermont architecture in-depth article

Article: Silvermont, Intel's Low Power Architecture
By: Ricardo B (ricardo.b.delete@this.xxxxx.xx), May 30, 2013 7:05 am
Room: Moderated Discussions
Sebastian Soeiro (sebastian_2896.delete@this.hotmail.com) on May 29, 2013 10:16 pm wrote:

> - Good to know that I have Haswell's scheduling system basically understood. However, I have one question;
> Haswell has four ports, yet somewhere in Haswell's article, it said that the scheduler can dispatch 8
> uops per clk in ideal conditions, whilst Sandy Bridge, with it's 6 ports, was only allowed 6 uops per
> clk in ideal conditions. So I understand most of what is being said, but what I don't understand is that
> 4 ports = 8 uops and 3 ports = 6 uops. It seems that 2 uops can be sent through one port per clk? Though
> I don't believe this is mentioned anywhere in the article. This confuses me; if you don't mind, could
> you please tell me why it seems that the ports have double the width they are made out to have?

Maybe it's not clear from David's diagrams, but it's explicitly written in the text: Haswell has 8 ports.


>
> - Your Silvermont link gives me a good idea more or less of what's going on. If I have a decent understanding
> of things, though some of the things you say confuse me a bit. What I understand from this diagram is that:
> The data prefetcher requests data, and it looks for this data in the L2 cache/L3 cache/RAM using the DTLB,
> where this data flows over to the store buffers and into the data cache for the execution units to use?
>
> A few things confuse me; and sorry for the mass of questions, I appreciate the help.
> - You say that only the path from L1 cache to the registers is shown, yet I
> see a path from L2 to registers. Am I wrong somewhere? Also, I do not see the
> RSV stations in the core diagram; perhaps they are omitted to save space?
> - Is it me, or does the labelled store buffer actually serve
> the function of a load buffer and a store buffer?
> - The AGU generates tags for the location of where data is stored in the caches
> and memory for use in the DTLB by flowing completed instructions to the ROB to notify
> the TLB of changes in data position or state. Is my understanding correct?

Wow. Nope.
First, put aside the prefetcher and the store buffers.

The AGU computes a _logical address_.
Then the DTLB computes a _physical address_, along with other bits of information, by performing a look up in the page table.
All that is fed to the L1 D$.
If it doesn't have the cache line, the L1 D$ will fetch it from the L2 $.
If L1 D$ does have the line, it will make the requested data available.
(I really see no path between the registers and the L2 $, by the way)

The store buffer is used to buffer stores, before they're actually commited to a cache line. The memory logic also checks the contents of the store buffer when performing a load.

Weather it comes from the L1 data cache or the store buffer, information is then routed to the registers via some data path (the think line going to the Integer Rename Buffers in Extremetech's diagram).

The prefetcher is an auxiliary, which tracks memory access patterns and prefetches caches lines which haven't been requested but (it hopes) will be needed soon.
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                                              Quibbling on multithreadingrwessel2013/06/02 10:54 PM
                                                Exploiting for SMT was my "contribution"Paul A. Clayton2013/06/03 03:53 AM
                                            Silvermont architecture in-depth articleMichael S2013/06/01 09:49 AM
                        Silvermont architecture in-depth articleRicardo B2013/05/30 03:41 PM
                          Didn't notice how this was to be organized...Sebastian Soeiro2013/05/30 06:55 PM
          Silvermont, not Saltwell? (NT)papapapa2013/05/28 03:33 PM
            Of course. Not enough sleep. (NT)Ricardo B2013/05/29 01:27 PM
  No out-of-order in FP cluster of silvermont?anon2013/06/28 02:27 AM
    No out-of-order in FP cluster of silvermont?Michael S2013/06/28 03:52 AM
      No out-of-order in FP cluster of silvermont?Exophase2013/06/28 12:54 PM
        No out-of-order in FP cluster of silvermont?Michael S2013/06/29 10:21 AM
          No out-of-order in FP cluster of silvermont?Exophase2013/06/29 08:07 PM
      No out-of-order in FP cluster of silvermont?Linus Torvalds2013/06/29 11:22 AM
        No out-of-order in FP cluster of silvermont?anon2013/06/29 04:26 PM
          No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 05:50 PM
            No out-of-order in FP cluster of silvermont?anon2013/06/29 08:15 PM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 08:31 PM
                No out-of-order in FP cluster of silvermont?anon2013/06/30 01:53 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 04:24 AM
                    No out-of-order in FP cluster of silvermont?anon2013/06/30 09:41 AM
                      No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 12:26 PM
                        No out-of-order in FP cluster of silvermont?anon2013/06/30 11:32 PM
                          No out-of-order in FP cluster of silvermont?EduardoS2013/07/01 04:40 PM
                            No out-of-order in FP cluster of silvermont?anon2013/07/01 05:44 PM
                            No out-of-order in FP cluster of silvermont?Michael S2013/07/02 04:40 AM
                              No out-of-order in FP cluster of silvermont?Exophase2013/07/02 08:03 AM
                              No out-of-order in FP cluster of silvermont?EduardoS2013/07/02 04:20 PM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 08:25 AM
                      No out-of-order in FP cluster of silvermont?Etienne2013/07/02 03:36 AM
                        No out-of-order in FP cluster of silvermont?anon2013/07/02 06:13 AM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:03 AM
                            No out-of-order in FP cluster of silvermont?anon2013/07/02 03:12 PM
                              No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 03:43 PM
                                No out-of-order in FP cluster of silvermont?anon2013/07/02 04:47 PM
                                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 06:36 PM
                                    No out-of-order in FP cluster of silvermont?anon2013/07/02 08:03 PM
                                      No out-of-order in FP cluster of silvermont?Symmetry2013/07/03 06:14 AM
                                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/03 08:04 PM
                                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/04 02:23 AM
                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:01 AM
                          No out-of-order in FP cluster of silvermont?Etienne2013/07/03 02:26 AM
                            layer 2 cache behaviourEtienne2013/07/05 02:14 AM
                              layer 2 cache behaviourMichael S2013/07/05 05:41 AM
                                layer 2 cache behaviourEtienne2013/07/05 08:15 AM
                              layer 2 cache behaviourPatrick Chase2013/07/05 10:37 AM
                                layer 2 cache behaviourMichael S2013/07/06 09:57 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 11:08 AM
                                    layer 2 cache behaviourPatrick Chase2013/07/06 11:19 AM
                                    layer 2 cache behaviourEtienne2013/07/08 02:10 AM
                                      layer 2 cache behaviourPatrick Chase2013/07/08 09:02 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 01:15 PM
                                  layer 2 cache behaviourUngo2013/07/09 02:24 PM
                      No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 07:43 AM
                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 07:34 AM
                    No out-of-order in FP cluster of silvermont?anon2013/07/02 03:15 PM
            No out-of-order in FP cluster of silvermont?none2013/06/30 04:03 AM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 04:45 AM
                No out-of-order in FP cluster of silvermont?none2013/06/30 05:28 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 12:27 PM
        No out-of-order in FP cluster of silvermont?x2013/06/30 02:54 AM
          No out-of-order in FP cluster of silvermont?Foo_2013/06/30 05:15 AM
        No out-of-order in FP cluster of silvermont?rwessel2013/06/30 09:11 PM
          No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/01 12:40 PM
            No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:35 AM
              No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/02 10:18 AM
            FPU in integer codes2013/07/02 10:38 AM
              FPU in integer codesPatrick Chase2013/07/02 10:56 AM
              FPU in integer codesLinus Torvalds2013/07/02 11:12 AM
                FPU in integer codesPatrick Chase2013/07/02 11:34 AM
                  FPU in integer codesLinus Torvalds2013/07/02 12:55 PM
        No out-of-order in FP cluster of silvermont?2013/06/30 10:42 PM
          No out-of-order in FP cluster of silvermont?bakaneko2013/07/03 02:54 AM
        What about integer SIMD?Exophase2013/06/30 11:44 PM
          What about integer SIMD?anon2013/07/01 12:45 AM
            What about integer SIMD?Michael S2013/07/01 07:57 AM
              What about integer SIMD?rwessel2013/07/01 02:39 PM
                What about integer SIMD?Michael S2013/07/01 03:11 PM
                  What about integer SIMD?EduardoS2013/07/01 05:04 PM
                    What about integer SIMD?Michael S2013/07/01 11:32 PM
          What about integer SIMD?hi2013/07/01 07:15 AM
            What about integer SIMD?Exophase2013/07/01 09:50 AM
            What about integer SIMD?David Kanter2013/07/02 12:20 PM
              What about integer SIMD?hi2013/07/02 02:48 PM
                What about integer SIMD?David Kanter2013/07/04 02:19 PM
  Silvermont architecture in-depth articleSebastian Soeiro2013/07/30 08:34 AM
    TLBs are caches of page tablesPaul A. Clayton2013/07/30 10:03 AM
      TLBs are caches of page tablesSebastian Soeiro2013/07/30 12:18 PM
        TLBs are caches of page tablesPaul A. Clayton2013/07/30 02:59 PM
          TLBs are caches of page tablesSebastian Soeiro2013/07/30 04:27 PM
            TLBs are caches of page tablesrwessel2013/07/30 06:01 PM
              TLBs are caches of page tablesSebastian Soeiro2013/07/31 01:15 PM
                Floorplan images show physical locationsPaul A. Clayton2013/07/31 03:11 PM
                  Floorplan images show physical locationsSebastian Soeiro2013/07/31 08:12 PM
                    Floorplan images show physical locationsrwessel2013/07/31 11:21 PM
                      Floorplan images show physical locationsSebastian Soeiro2013/08/02 11:58 AM
                        Floorplan images show physical locationsAntti-Ville Tuunainen2013/08/02 01:09 PM
                        Floorplan images show physical locationsStubabe2013/08/02 06:49 PM
                          Floorplan images show physical locationsSebastian Soeiro2013/08/03 07:23 AM
                            Floorplan images show physical locationsrwessel2013/08/03 10:16 PM
                            Floorplan images show physical locationsMelody Speer2013/08/04 03:11 AM
                              Floorplan images show physical locationsSebastian Soeiro2013/08/04 04:42 PM
                                Floorplan images show physical locationsrwessel2013/08/04 09:58 PM
                                  Floorplan images show physical locationsSebastian Soeiro2013/08/07 02:33 PM
                                    Floorplan images show physical locationsrwessel2013/08/08 12:03 PM
                                      Floorplan images show physical locationsSebastian Soeiro2013/08/11 08:20 AM
                                        Page tables are set up by the OSPaul A. Clayton2013/08/11 12:25 PM
                                          Page tables are set up by the OSSebastian Soeiro2013/08/16 07:43 PM
                                            Multilevel page table formatPaul A. Clayton2013/08/17 10:18 AM
                                              Multilevel page table formatSebastian Soeiro2013/08/19 02:28 PM
                                                Multilevel page table formatrwessel2013/08/19 11:08 PM
                                                  Multilevel page table formatSebastian Soeiro2013/08/22 03:52 PM
                                                    Multilevel page table formatTREZA2013/08/22 04:30 PM
                                                    Multilevel page table formatrwessel2013/08/23 09:58 PM
                                                      Multilevel page table formatSebastian Soeiro2013/08/25 07:20 AM
                TLBs are caches of page tablesrwessel2013/07/31 11:41 PM
                  TLBs are caches of page tablesSebastian Soeiro2013/08/02 11:51 AM
                    TLBs are caches of page tablesrwessel2013/08/02 05:55 PM
  Silvermont instruction schedulingHugo Décharnes2013/10/02 02:25 AM
    Silvermont instruction schedulingMichael S2013/10/02 03:29 AM
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