Quibbling on multithreading

Article: Silvermont, Intel's Low Power Architecture
By: rwessel (robertwessel.delete@this.yahoo.com), June 2, 2013 11:54 pm
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on June 1, 2013 10:11 am wrote:
> rwessel (robertwessel.delete@this.yahoo.com) on May 31, 2013 9:02 pm wrote:
> > Sebastian Soeiro (sebastian_2896.delete@this.hotmail.com) on May 31, 2013 6:59 pm wrote:
> [snip]
> >> Just one last little thing; why is this only done for two threads and not a variable amount
> >> of threads? Was it done for some sort of balancing; that having more than two threads would
> >> create way too much stress on the resources of one core? So they chose two as a middle ground?
> >
> >
> > It depends on the expected workloads, and the rest of the CPU's design.
> >
> > All of Intel's x86 SMT implementations have been two thread, and I think all of the IPF ones have
> > been two thread as well, although I could be misremembering Poulson's specs. OTOH, both Sun/Oracle
> > (UltrasSPARC T1 with four, T2 with eight) and IBM (POWER7 - four) have implement larger numbers.
>
> Just to quibble a bit, Itanium uses Switch-on-Event-MultiThreading and UltraSPARC T1 used Fine-Grained
> MultiThreading (IIRC). Both T2 and POWER7 (in SMT4 mode) "cheat" a bit in exploiting clustering/partitioning;
> the full resources of the core are not available to a thread.
>
> > Supporting higher numbers is not free, each active context must (approximately) duplicate the entire
> > architected state of the processor.
>
> This is part of what makes POWER7's SMT4 mode kind of neat (Boasting: I thought of this technique independently
> [just over 3 years ago, though presumably several years later than IBM did].); it exploits the register
> file duplication used to reduce the number of read ports in order to support a doubling of the number of threads
> without having to double the number of register file entries. Halving the potential (but not actual) instruction-level
> parallelism to accomplish this can be an acceptable penalty for low ILP workloads.


Physically splitting the register file is not that new an idea (some of the later Alpha's did that, although not in an MT context, and different types of registers have often been physically segregated), but does play well in POWER's SMT, particularly in the 1/2/4 thread configurations allowed (one thread gets to use only one register file's worth of registers, but has full access to the remainder of the chips' resources, two threads each get a complete copy of the register file, but have to share the rest of the chip, 4 have to share the RF too).

In many ways, it's an easy tradeoff if you can figure some way to partition the register file (and by-thread is particularly simple). RF size is roughly proportional to square of the number of ports (and obviously the number of registers). Assuming you though N registers and P ports was a good match for a single thread, you could implement a 2N and 2P register file for a 2T machine, or two 2N/1P register files, which would still give a single thread access to 2N physical registers, would probably be faster, and yet would only take half the area of the single 2N/2P design.
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                      quad-core since Nov 2006mpx2013/05/13 01:34 AM
                        quad-core since Nov 2006RichardC2013/05/13 03:48 AM
                          quad-core since Nov 2006Jukka Larja2013/05/14 11:34 AM
                            quad-core since Nov 2006RichardC2013/05/14 12:23 PM
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                          SMT is a dodo birdMichael S2013/05/13 03:50 AM
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                          SMT is a dodo birdRicardo B2013/05/14 11:18 AM
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                                   4C/4T 4.0GHz was significantly faster than 4C/4T 3.8GHz??Exophase2013/05/14 08:10 PM
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                          SMT is a dodo birdJukka Larja2013/05/15 09:02 AM
                        SMT is a dodo birdPatrick Chase2013/05/17 09:43 AM
                          SMT is a dodo birdJouni Osmala2013/05/17 10:27 AM
                          SMT is a dodo birdBrett2013/05/17 07:26 PM
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                  SMT is a dodo birdRichardC2013/05/12 06:57 AM
                SMT is a dodo birdJukka Larja2013/05/12 03:33 AM
                SMT is a dodo birdStubabe2013/05/14 12:09 PM
                  SMT is a dodo birdRichardC2013/05/14 01:43 PM
                    SMT is a dodo birdRicardo B2013/05/14 03:00 PM
                      SMT is a dodo birdRichardC2013/05/14 06:27 PM
                        SMT is a dodo birdRicardo B2013/05/15 03:50 AM
                          SMT is a dodo birdRichardC2013/05/15 08:53 AM
                            SMT is a dodo birdRicardo B2013/05/15 09:31 AM
                              SMT is a dodo birdRichardC2013/05/15 11:13 AM
                                SMT is a dodo birdRicardo B2013/05/15 12:43 PM
                                  SMT is a dodo birdRichardC2013/05/15 01:15 PM
                                    SMT is a dodo birdRicardo B2013/05/15 01:40 PM
                                      SMT is a dodo birdRichardC2013/05/15 02:00 PM
                                        SMT is a dodo birdMaynard Handley2013/05/15 03:55 PM
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                    SMT is a dodo birdStubabe2013/05/16 11:54 AM
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                      Using the available die areaStubabe2013/05/16 11:26 AM
                        Using the available die areaRicardo B2013/05/16 02:05 PM
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          SMT is a dodo birdmpx2013/05/12 12:04 PM
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              SMT is a dodo birdmpx2013/05/12 06:13 PM
                Thanks for the actual research effort! (NT)Paul A. Clayton2013/05/13 05:43 AM
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                              FYI Tegra4 has A15 in it also, so 3 devicesS. Rao2013/05/22 10:06 AM
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                                            Quibbling on multithreadingPaul A. Clayton2013/06/01 10:11 AM
                                              Quibbling on multithreadingrwessel2013/06/02 11:54 PM
                                                Exploiting for SMT was my "contribution"Paul A. Clayton2013/06/03 04:53 AM
                                            Silvermont architecture in-depth articleMichael S2013/06/01 10:49 AM
                        Silvermont architecture in-depth articleRicardo B2013/05/30 04:41 PM
                          Didn't notice how this was to be organized...Sebastian Soeiro2013/05/30 07:55 PM
          Silvermont, not Saltwell? (NT)papapapa2013/05/28 04:33 PM
            Of course. Not enough sleep. (NT)Ricardo B2013/05/29 02:27 PM
  No out-of-order in FP cluster of silvermont?anon2013/06/28 03:27 AM
    No out-of-order in FP cluster of silvermont?Michael S2013/06/28 04:52 AM
      No out-of-order in FP cluster of silvermont?Exophase2013/06/28 01:54 PM
        No out-of-order in FP cluster of silvermont?Michael S2013/06/29 11:21 AM
          No out-of-order in FP cluster of silvermont?Exophase2013/06/29 09:07 PM
      No out-of-order in FP cluster of silvermont?Linus Torvalds2013/06/29 12:22 PM
        No out-of-order in FP cluster of silvermont?anon2013/06/29 05:26 PM
          No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 06:50 PM
            No out-of-order in FP cluster of silvermont?anon2013/06/29 09:15 PM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 09:31 PM
                No out-of-order in FP cluster of silvermont?anon2013/06/30 02:53 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 05:24 AM
                    No out-of-order in FP cluster of silvermont?anon2013/06/30 10:41 AM
                      No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 01:26 PM
                        No out-of-order in FP cluster of silvermont?anon2013/07/01 12:32 AM
                          No out-of-order in FP cluster of silvermont?EduardoS2013/07/01 05:40 PM
                            No out-of-order in FP cluster of silvermont?anon2013/07/01 06:44 PM
                            No out-of-order in FP cluster of silvermont?Michael S2013/07/02 05:40 AM
                              No out-of-order in FP cluster of silvermont?Exophase2013/07/02 09:03 AM
                              No out-of-order in FP cluster of silvermont?EduardoS2013/07/02 05:20 PM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:25 AM
                      No out-of-order in FP cluster of silvermont?Etienne2013/07/02 04:36 AM
                        No out-of-order in FP cluster of silvermont?anon2013/07/02 07:13 AM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 10:03 AM
                            No out-of-order in FP cluster of silvermont?anon2013/07/02 04:12 PM
                              No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 04:43 PM
                                No out-of-order in FP cluster of silvermont?anon2013/07/02 05:47 PM
                                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 07:36 PM
                                    No out-of-order in FP cluster of silvermont?anon2013/07/02 09:03 PM
                                      No out-of-order in FP cluster of silvermont?Symmetry2013/07/03 07:14 AM
                                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/03 09:04 PM
                                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/04 03:23 AM
                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 10:01 AM
                          No out-of-order in FP cluster of silvermont?Etienne2013/07/03 03:26 AM
                            layer 2 cache behaviourEtienne2013/07/05 03:14 AM
                              layer 2 cache behaviourMichael S2013/07/05 06:41 AM
                                layer 2 cache behaviourEtienne2013/07/05 09:15 AM
                              layer 2 cache behaviourPatrick Chase2013/07/05 11:37 AM
                                layer 2 cache behaviourMichael S2013/07/06 10:57 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 12:08 PM
                                    layer 2 cache behaviourPatrick Chase2013/07/06 12:19 PM
                                    layer 2 cache behaviourEtienne2013/07/08 03:10 AM
                                      layer 2 cache behaviourPatrick Chase2013/07/08 10:02 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 02:15 PM
                                  layer 2 cache behaviourUngo2013/07/09 03:24 PM
                      No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 08:43 AM
                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 08:34 AM
                    No out-of-order in FP cluster of silvermont?anon2013/07/02 04:15 PM
            No out-of-order in FP cluster of silvermont?none2013/06/30 05:03 AM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 05:45 AM
                No out-of-order in FP cluster of silvermont?none2013/06/30 06:28 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 01:27 PM
        No out-of-order in FP cluster of silvermont?x2013/06/30 03:54 AM
          No out-of-order in FP cluster of silvermont?Foo_2013/06/30 06:15 AM
        No out-of-order in FP cluster of silvermont?rwessel2013/06/30 10:11 PM
          No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/01 01:40 PM
            No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 10:35 AM
              No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/02 11:18 AM
            FPU in integer codes2013/07/02 11:38 AM
              FPU in integer codesPatrick Chase2013/07/02 11:56 AM
              FPU in integer codesLinus Torvalds2013/07/02 12:12 PM
                FPU in integer codesPatrick Chase2013/07/02 12:34 PM
                  FPU in integer codesLinus Torvalds2013/07/02 01:55 PM
        No out-of-order in FP cluster of silvermont?2013/06/30 11:42 PM
          No out-of-order in FP cluster of silvermont?bakaneko2013/07/03 03:54 AM
        What about integer SIMD?Exophase2013/07/01 12:44 AM
          What about integer SIMD?anon2013/07/01 01:45 AM
            What about integer SIMD?Michael S2013/07/01 08:57 AM
              What about integer SIMD?rwessel2013/07/01 03:39 PM
                What about integer SIMD?Michael S2013/07/01 04:11 PM
                  What about integer SIMD?EduardoS2013/07/01 06:04 PM
                    What about integer SIMD?Michael S2013/07/02 12:32 AM
          What about integer SIMD?hi2013/07/01 08:15 AM
            What about integer SIMD?Exophase2013/07/01 10:50 AM
            What about integer SIMD?David Kanter2013/07/02 01:20 PM
              What about integer SIMD?hi2013/07/02 03:48 PM
                What about integer SIMD?David Kanter2013/07/04 03:19 PM
  Silvermont architecture in-depth articleSebastian Soeiro2013/07/30 09:34 AM
    TLBs are caches of page tablesPaul A. Clayton2013/07/30 11:03 AM
      TLBs are caches of page tablesSebastian Soeiro2013/07/30 01:18 PM
        TLBs are caches of page tablesPaul A. Clayton2013/07/30 03:59 PM
          TLBs are caches of page tablesSebastian Soeiro2013/07/30 05:27 PM
            TLBs are caches of page tablesrwessel2013/07/30 07:01 PM
              TLBs are caches of page tablesSebastian Soeiro2013/07/31 02:15 PM
                Floorplan images show physical locationsPaul A. Clayton2013/07/31 04:11 PM
                  Floorplan images show physical locationsSebastian Soeiro2013/07/31 09:12 PM
                    Floorplan images show physical locationsrwessel2013/08/01 12:21 AM
                      Floorplan images show physical locationsSebastian Soeiro2013/08/02 12:58 PM
                        Floorplan images show physical locationsAntti-Ville Tuunainen2013/08/02 02:09 PM
                        Floorplan images show physical locationsStubabe2013/08/02 07:49 PM
                          Floorplan images show physical locationsSebastian Soeiro2013/08/03 08:23 AM
                            Floorplan images show physical locationsrwessel2013/08/03 11:16 PM
                            Floorplan images show physical locationsMelody Speer2013/08/04 04:11 AM
                              Floorplan images show physical locationsSebastian Soeiro2013/08/04 05:42 PM
                                Floorplan images show physical locationsrwessel2013/08/04 10:58 PM
                                  Floorplan images show physical locationsSebastian Soeiro2013/08/07 03:33 PM
                                    Floorplan images show physical locationsrwessel2013/08/08 01:03 PM
                                      Floorplan images show physical locationsSebastian Soeiro2013/08/11 09:20 AM
                                        Page tables are set up by the OSPaul A. Clayton2013/08/11 01:25 PM
                                          Page tables are set up by the OSSebastian Soeiro2013/08/16 08:43 PM
                                            Multilevel page table formatPaul A. Clayton2013/08/17 11:18 AM
                                              Multilevel page table formatSebastian Soeiro2013/08/19 03:28 PM
                                                Multilevel page table formatrwessel2013/08/20 12:08 AM
                                                  Multilevel page table formatSebastian Soeiro2013/08/22 04:52 PM
                                                    Multilevel page table formatTREZA2013/08/22 05:30 PM
                                                    Multilevel page table formatrwessel2013/08/23 10:58 PM
                                                      Multilevel page table formatSebastian Soeiro2013/08/25 08:20 AM
                TLBs are caches of page tablesrwessel2013/08/01 12:41 AM
                  TLBs are caches of page tablesSebastian Soeiro2013/08/02 12:51 PM
                    TLBs are caches of page tablesrwessel2013/08/02 06:55 PM
  Silvermont instruction schedulingHugo Décharnes2013/10/02 03:25 AM
    Silvermont instruction schedulingMichael S2013/10/02 04:29 AM
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