Patrick Chase (patrickjchase.delete@this.gmail.com) on July 6, 2013 12:08 pm wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on July 6, 2013 10:57 am wrote:
> > Huh?
> > Show me not "many", but just one modern general-purpose processor with write-back
> > cache that does not write-allocate by default. AFAIK, there are none.
> > Streaming stores are another matter.
>
> Cortex A8, along with several older and/or lower-end ARM cores. See section 7.3.3 of the TRM. Cortex
> A8 does support write-allocate at L2, but enabling it has fairly nasty impacts on write bandwidth.

I would also note that the A7 has a write-back L1 but dynamically switches between write-allocate and read-allocate. See for example section 2.1.1 of the A7 TRM.