layer 2 cache behaviour

Article: Silvermont, Intel's Low Power Architecture
By: Ungo (a.delete@this.b.c.d.e), July 9, 2013 2:24 pm
Room: Moderated Discussions
Michael S (already5chosen.delete@this.yahoo.com) on July 6, 2013 10:57 am wrote:
> Patrick Chase (patrickjchase.delete@this.gmail.com) on July 5, 2013 11:37 am wrote:
> > The line sizes for all levels are typically the same. If they weren't then coherency and OS cache
> > management would become more complicated. With that said, a cache that has valid/dirty bits for
> > partial lines is called a sectored cache (a very old technique first used in the 360/85). The
> > only recent microarchticture that I know of that uses a sectored cache is the NVIDIA Fermi GPU
> > family, which appear to use a sectored L2 with 128-byte lines and 32-byte sectors [*].
> >
> > -- Patrick
>
> Crystallwell L4 should do something similar. It's not yet documented in the Intel optimization
> reference manual, but anything else simply does not make a technical sense.

You're referring to the discussion a few weeks back about Intel possibly reusing 2MB of the L3 SRAM for tags, which would force 128-byte lines and a 2-stage lookup? I thought that sounded reasonable, and still do, but I recently convinced myself that it can't be what's actually going on. Consider die sizes:

AnandTech's Iris Pro 5200 review

Haswell GT3e quadcore, 6MB L3: 264mm^2 (Crystalwell)
Haswell GT2 quadcore, up to 8MB L3: 177mm^2
Haswell GT3 dualcore, up to 4MB L3: 181mm^2

The GT3(e) GPU occupies about twice the die area as GT2. Operating on the assumption that the GT3e die really has an 8MB L3 array with 2MB repurposed for tag, you'd guess that the GT3 GPU is therefore 2*(264-177) = 174mm^2, a calculation Anand makes. But he didn't notice that this is absurd: that's just 7mm^2 less than the entire GT3 dualcore die. So clearly there's something adding substantial die area to Crystalwell other than the GPU.

In fact, if we do some crude photogrammetry on this die shot of GT3 dualcore, about 58% of the die is GPU, or 104mm^2. 177+(104/2) = 229mm^2, leaving us with about 35mm^2 unaccounted for in Crystalwell. In this shot of the 177mm^2 GT2 quadcore, the 8MB L3 cache appears to take up about 15 to 16% of the die, so about 28mm^2. What if, rather than reusing 2MB worth of L3 as L4 tag, Intel has actually downsized it to 21mm^2, and used the ~42mm^2 of area growth to build dedicated tags for the 128MB L4, possibly with 64-byte lines? (No doubt some of that area is used on L4 I/O and control logic, but it seems like there's more than enough area for fine grained L4 tags.)

The other thing which suggests Intel isn't building a die that can repurpose part of the L3 array is simply that as of now, they have not announced a single 264mm^2 Haswell quadcore with 8MB L3 and without Crystalwell. That die appears to be for Crystalwell only.
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                                            Silvermont architecture in-depth articleMichael S2013/06/01 09:49 AM
                        Silvermont architecture in-depth articleRicardo B2013/05/30 03:41 PM
                          Didn't notice how this was to be organized...Sebastian Soeiro2013/05/30 06:55 PM
          Silvermont, not Saltwell? (NT)papapapa2013/05/28 03:33 PM
            Of course. Not enough sleep. (NT)Ricardo B2013/05/29 01:27 PM
  No out-of-order in FP cluster of silvermont?anon2013/06/28 02:27 AM
    No out-of-order in FP cluster of silvermont?Michael S2013/06/28 03:52 AM
      No out-of-order in FP cluster of silvermont?Exophase2013/06/28 12:54 PM
        No out-of-order in FP cluster of silvermont?Michael S2013/06/29 10:21 AM
          No out-of-order in FP cluster of silvermont?Exophase2013/06/29 08:07 PM
      No out-of-order in FP cluster of silvermont?Linus Torvalds2013/06/29 11:22 AM
        No out-of-order in FP cluster of silvermont?anon2013/06/29 04:26 PM
          No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 05:50 PM
            No out-of-order in FP cluster of silvermont?anon2013/06/29 08:15 PM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/29 08:31 PM
                No out-of-order in FP cluster of silvermont?anon2013/06/30 01:53 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 04:24 AM
                    No out-of-order in FP cluster of silvermont?anon2013/06/30 09:41 AM
                      No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 12:26 PM
                        No out-of-order in FP cluster of silvermont?anon2013/06/30 11:32 PM
                          No out-of-order in FP cluster of silvermont?EduardoS2013/07/01 04:40 PM
                            No out-of-order in FP cluster of silvermont?anon2013/07/01 05:44 PM
                            No out-of-order in FP cluster of silvermont?Michael S2013/07/02 04:40 AM
                              No out-of-order in FP cluster of silvermont?Exophase2013/07/02 08:03 AM
                              No out-of-order in FP cluster of silvermont?EduardoS2013/07/02 04:20 PM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 08:25 AM
                      No out-of-order in FP cluster of silvermont?Etienne2013/07/02 03:36 AM
                        No out-of-order in FP cluster of silvermont?anon2013/07/02 06:13 AM
                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:03 AM
                            No out-of-order in FP cluster of silvermont?anon2013/07/02 03:12 PM
                              No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 03:43 PM
                                No out-of-order in FP cluster of silvermont?anon2013/07/02 04:47 PM
                                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 06:36 PM
                                    No out-of-order in FP cluster of silvermont?anon2013/07/02 08:03 PM
                                      No out-of-order in FP cluster of silvermont?Symmetry2013/07/03 06:14 AM
                                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/03 08:04 PM
                                          No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/04 02:23 AM
                        No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:01 AM
                          No out-of-order in FP cluster of silvermont?Etienne2013/07/03 02:26 AM
                            layer 2 cache behaviourEtienne2013/07/05 02:14 AM
                              layer 2 cache behaviourMichael S2013/07/05 05:41 AM
                                layer 2 cache behaviourEtienne2013/07/05 08:15 AM
                              layer 2 cache behaviourPatrick Chase2013/07/05 10:37 AM
                                layer 2 cache behaviourMichael S2013/07/06 09:57 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 11:08 AM
                                    layer 2 cache behaviourPatrick Chase2013/07/06 11:19 AM
                                    layer 2 cache behaviourEtienne2013/07/08 02:10 AM
                                      layer 2 cache behaviourPatrick Chase2013/07/08 09:02 AM
                                  layer 2 cache behaviourPatrick Chase2013/07/06 01:15 PM
                                  layer 2 cache behaviourUngo2013/07/09 02:24 PM
                      No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 07:43 AM
                  No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 07:34 AM
                    No out-of-order in FP cluster of silvermont?anon2013/07/02 03:15 PM
            No out-of-order in FP cluster of silvermont?none2013/06/30 04:03 AM
              No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 04:45 AM
                No out-of-order in FP cluster of silvermont?none2013/06/30 05:28 AM
                  No out-of-order in FP cluster of silvermont?EduardoS2013/06/30 12:27 PM
        No out-of-order in FP cluster of silvermont?x2013/06/30 02:54 AM
          No out-of-order in FP cluster of silvermont?Foo_2013/06/30 05:15 AM
        No out-of-order in FP cluster of silvermont?rwessel2013/06/30 09:11 PM
          No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/01 12:40 PM
            No out-of-order in FP cluster of silvermont?Patrick Chase2013/07/02 09:35 AM
              No out-of-order in FP cluster of silvermont?Linus Torvalds2013/07/02 10:18 AM
            FPU in integer codes2013/07/02 10:38 AM
              FPU in integer codesPatrick Chase2013/07/02 10:56 AM
              FPU in integer codesLinus Torvalds2013/07/02 11:12 AM
                FPU in integer codesPatrick Chase2013/07/02 11:34 AM
                  FPU in integer codesLinus Torvalds2013/07/02 12:55 PM
        No out-of-order in FP cluster of silvermont?2013/06/30 10:42 PM
          No out-of-order in FP cluster of silvermont?bakaneko2013/07/03 02:54 AM
        What about integer SIMD?Exophase2013/06/30 11:44 PM
          What about integer SIMD?anon2013/07/01 12:45 AM
            What about integer SIMD?Michael S2013/07/01 07:57 AM
              What about integer SIMD?rwessel2013/07/01 02:39 PM
                What about integer SIMD?Michael S2013/07/01 03:11 PM
                  What about integer SIMD?EduardoS2013/07/01 05:04 PM
                    What about integer SIMD?Michael S2013/07/01 11:32 PM
          What about integer SIMD?hi2013/07/01 07:15 AM
            What about integer SIMD?Exophase2013/07/01 09:50 AM
            What about integer SIMD?David Kanter2013/07/02 12:20 PM
              What about integer SIMD?hi2013/07/02 02:48 PM
                What about integer SIMD?David Kanter2013/07/04 02:19 PM
  Silvermont architecture in-depth articleSebastian Soeiro2013/07/30 08:34 AM
    TLBs are caches of page tablesPaul A. Clayton2013/07/30 10:03 AM
      TLBs are caches of page tablesSebastian Soeiro2013/07/30 12:18 PM
        TLBs are caches of page tablesPaul A. Clayton2013/07/30 02:59 PM
          TLBs are caches of page tablesSebastian Soeiro2013/07/30 04:27 PM
            TLBs are caches of page tablesrwessel2013/07/30 06:01 PM
              TLBs are caches of page tablesSebastian Soeiro2013/07/31 01:15 PM
                Floorplan images show physical locationsPaul A. Clayton2013/07/31 03:11 PM
                  Floorplan images show physical locationsSebastian Soeiro2013/07/31 08:12 PM
                    Floorplan images show physical locationsrwessel2013/07/31 11:21 PM
                      Floorplan images show physical locationsSebastian Soeiro2013/08/02 11:58 AM
                        Floorplan images show physical locationsAntti-Ville Tuunainen2013/08/02 01:09 PM
                        Floorplan images show physical locationsStubabe2013/08/02 06:49 PM
                          Floorplan images show physical locationsSebastian Soeiro2013/08/03 07:23 AM
                            Floorplan images show physical locationsrwessel2013/08/03 10:16 PM
                            Floorplan images show physical locationsMelody Speer2013/08/04 03:11 AM
                              Floorplan images show physical locationsSebastian Soeiro2013/08/04 04:42 PM
                                Floorplan images show physical locationsrwessel2013/08/04 09:58 PM
                                  Floorplan images show physical locationsSebastian Soeiro2013/08/07 02:33 PM
                                    Floorplan images show physical locationsrwessel2013/08/08 12:03 PM
                                      Floorplan images show physical locationsSebastian Soeiro2013/08/11 08:20 AM
                                        Page tables are set up by the OSPaul A. Clayton2013/08/11 12:25 PM
                                          Page tables are set up by the OSSebastian Soeiro2013/08/16 07:43 PM
                                            Multilevel page table formatPaul A. Clayton2013/08/17 10:18 AM
                                              Multilevel page table formatSebastian Soeiro2013/08/19 02:28 PM
                                                Multilevel page table formatrwessel2013/08/19 11:08 PM
                                                  Multilevel page table formatSebastian Soeiro2013/08/22 03:52 PM
                                                    Multilevel page table formatTREZA2013/08/22 04:30 PM
                                                    Multilevel page table formatrwessel2013/08/23 09:58 PM
                                                      Multilevel page table formatSebastian Soeiro2013/08/25 07:20 AM
                TLBs are caches of page tablesrwessel2013/07/31 11:41 PM
                  TLBs are caches of page tablesSebastian Soeiro2013/08/02 11:51 AM
                    TLBs are caches of page tablesrwessel2013/08/02 05:55 PM
  Silvermont instruction schedulingHugo Décharnes2013/10/02 02:25 AM
    Silvermont instruction schedulingMichael S2013/10/02 03:29 AM
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