By: , August 16, 2013 8:43 pm
Room: Moderated Discussions
Paul A. Clayton (paaronclayton.delete@this.gmail.com) on August 11, 2013 1:25 pm wrote:
> Sebastian Soeiro (sebastian_2896.delete@this.hotmail.com) on August 11, 2013 9:20 am wrote:
> [snip]
> > - So the page walker finds the physical address associated with a virtual
> > address... But how is this association "known" to the page walker?
>
> The page tables are set up the by operating system. With a hardware page table walker, the format used for
> each entry in the page table and how the entries are indexed are both defined by the architecture.
>
> With the common hierarchical page table format (x86, ARM, and now Release 5 of MIPS), a (physical)
> page table base address is provided in a special purpose register (whose value must be changed by
> the OS when the address space changes). A selection of more significant virtual bits are used to index
> off of this base address. (Often a number of the most significant bits are ignored and forced to match
> the most significant bit in this selection.) The entry at that index provides the physical address
> for the next layer of the page table. A selection of virtual address bits starting from the bit just
> less significant than the earlier selection is used to index from the retrieved base.
>
> For 32-bit address spaces with 4KiB pages and page table entries 32 bits in size, bits 22 through 31 are used
> to index the table pointed to by the special purpose register (with two zero bits appended to provide a 32-bit
> aligned address). The address value in the indexed entry (typically 20 bits in size, one bit is used as a valid
> bit, and the other 11 bits can be used for permissions or other metadata) is used as the base address for a
> second table. This second table is indexed with bits 12 through 21 of the virtual address. The entry at this
> index provides the physical address of the page for the virtual address. Bits 0 through 11 of the virtual provide
> the offset within the page (these bits are the same for virtual and physical addresses).
Thank you very much for your reply; sorry again for replying so late, this week has certainly been... Eventful for me to say the least.
Nonetheless, your reply is... Not to be offensive; but it goes way over my head. I just don't know where to "dig in" to start making sense of it. Maybe it's because I dont understand the makeup of all the bits in an address.
However, I did see the mention of page tables; but then there seems to be a mention of a table of values for the page table which is a table of values itself? It seems a bit redundant to me and I guess that's where my understanding starts dropping off.
What is this "special register" you refer to? I was told previously that the page tables are kept in the main memory. Is this special register sortof like a cache for the page table?
I apologize; I'm sure you put time into your reply but I just don't understand it... Thanks again for your help as always however! Any and all help is appreciated!
> Sebastian Soeiro (sebastian_2896.delete@this.hotmail.com) on August 11, 2013 9:20 am wrote:
> [snip]
> > - So the page walker finds the physical address associated with a virtual
> > address... But how is this association "known" to the page walker?
>
> The page tables are set up the by operating system. With a hardware page table walker, the format used for
> each entry in the page table and how the entries are indexed are both defined by the architecture.
>
> With the common hierarchical page table format (x86, ARM, and now Release 5 of MIPS), a (physical)
> page table base address is provided in a special purpose register (whose value must be changed by
> the OS when the address space changes). A selection of more significant virtual bits are used to index
> off of this base address. (Often a number of the most significant bits are ignored and forced to match
> the most significant bit in this selection.) The entry at that index provides the physical address
> for the next layer of the page table. A selection of virtual address bits starting from the bit just
> less significant than the earlier selection is used to index from the retrieved base.
>
> For 32-bit address spaces with 4KiB pages and page table entries 32 bits in size, bits 22 through 31 are used
> to index the table pointed to by the special purpose register (with two zero bits appended to provide a 32-bit
> aligned address). The address value in the indexed entry (typically 20 bits in size, one bit is used as a valid
> bit, and the other 11 bits can be used for permissions or other metadata) is used as the base address for a
> second table. This second table is indexed with bits 12 through 21 of the virtual address. The entry at this
> index provides the physical address of the page for the virtual address. Bits 0 through 11 of the virtual provide
> the offset within the page (these bits are the same for virtual and physical addresses).
Thank you very much for your reply; sorry again for replying so late, this week has certainly been... Eventful for me to say the least.
Nonetheless, your reply is... Not to be offensive; but it goes way over my head. I just don't know where to "dig in" to start making sense of it. Maybe it's because I dont understand the makeup of all the bits in an address.
However, I did see the mention of page tables; but then there seems to be a mention of a table of values for the page table which is a table of values itself? It seems a bit redundant to me and I guess that's where my understanding starts dropping off.
What is this "special register" you refer to? I was told previously that the page tables are kept in the main memory. Is this special register sortof like a cache for the page table?
I apologize; I'm sure you put time into your reply but I just don't understand it... Thanks again for your help as always however! Any and all help is appreciated!