Separate instruction and data registers BAD or NOT, m68k

By: Brett (ggtgp.delete@this.yahoo.com), September 4, 2013 11:27 pm
Room: Moderated Discussions
Megol (golem960.delete@this.gmail.com) on September 4, 2013 7:04 am wrote:
> Brett (ggtgp.delete@this.yahoo.com) on August 30, 2013 6:42 pm wrote:
> > Linus Torvalds (torvalds.delete@this.linux-foundation.org) on August 30, 2013 4:13 pm wrote:
> > The primary reason for separate instruction and data registers is better code density
> > for the number of registers used. The m68k was used in new computers where 64k of RAM
> > was not enough and so you needed 32 bit addressing, but you often had barely more than
> > that. minor hassles for occasional copies between A/D sets are irrelevant whining.
> >
> > High end (all?) m68k designs used a unified register set internally, and like
> > the x86 register copies can be taken care of by the front end and are "free".
>
> Are they really unified? With high-end I guess you mean 68060 which is a Pentium-class processor.
> Register copies of course can be "free" but doing it for the 68k is much harder than on x86:
> MOVE instructions sets flags. To remove copies the hardware either have to look ahead verifying
> that the flags will be overwritten before any use _or_ do a partial removal letting the MOVE
> be executed on a dedicated very simple unit. A combination can of course be used too.

Flag handling is one of the many reasons m68k deserved to die. The irony is the level of care and concern to handle flags "correctly" with a complete spec, unlike most other CPU's of the time. Only later was it realized that flag setting should be all or none.

A modern design with a split register set would not make such a basic mistake in handling copies between the register sets.

Downsides:
A extra one cycle latency cost for between set copies, when that copy is on the critical chain, which almost never happens.

Upsides:
Each register/ALU cluster needs fewer ports/wires, less heat and fewer gate delays.
For code that could use the ALU's ops up to four times the performance with four register sets.

Observations:
You will be load/store limited most of the time, but ALU's are cheap/free so why not?
Vector units handle heavy ALU ops well, so that case is mostly covered.
Each register set would support vector ops, so you still get up to four times the performance.
You will be REALLY load/store limited most of the time. Load/stores cost HEAT to scale.

Feel free to add to these lists, make corrections, etc.

> > For a truly high end system the split register files are a bonus, the Alpha CPU tried splitting
> > odd and even registers to separate register file ALU blocks for higher performance. Something
> > we will see again, probably in the Mill CPU since they want to issue 33 operations a cycle.
>
> Eh... The main idea behind the mill is not to have registers. And it haven't got any.

The belt I bet is backed up with a register file where needed to be. (Most values will be in the plentiful ALU's.)

> > Anyone designing a fresh from scratch high end CPU today would be thinking of adding multiple bits
> > to instructions to signify register bank use. Take ARM like instructions and reuse 2 bits of the
> > useless predication part of the instruction to give you 4 register banks of 16 registers.
>
> Prediction isn't useless.

ARM64 completely removes predication from 64bit mode.

> The failure isn't that strange. The market for 68k processors wasn't enough for designing a 68080.
> The market wasn't enough for continuing the 88k series RISC either. Motorola then simplified the 68k
> ISA into the ColdFire ISA for embedded designs (keeping near source compatibility and even for a subset
> binary compatibility) and began working on PowerPC which - at that time - seemed to have a bright future
> and would most likely replace the industrial standard architecture (=IBM PC compatibles).

I list the followup 88k series as proof positive that Motorola had no idea what it was doing.
Saving the flags in a register, really? That costs more write ports on the register file, stupid.
Floating point in the integer register file, really?

Of course today I think floating point in the integer register file might be a good idea, but back when I first read the docs I thought it was stupid cost savings move that would hurt performance. Moto clearly cared about embedded and high end was just a hobby.

Until the recent generations Intel CPU's had a unified register set under the hood, this is why AMD ran FPU code faster.

If split register sets became popular x86 would add simple integer instructions to the FPU, you already have vector integer instructions, so it would be quite simple to implement.
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                        An elaborate theory of why AMD64 succeededanon2013/08/21 02:09 AM
                          An elaborate theory of why AMD64 succeeded2013/08/21 04:12 AM
                            An elaborate theory of why AMD64 succeededbakaneko2013/08/21 04:39 AM
                              An elaborate theory of why AMD64 succeeded2013/08/21 05:20 AM
                                An elaborate theory of why AMD64 succeededbakaneko2013/08/21 05:41 AM
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                            An elaborate theory of why AMD64 succeededanon2013/08/21 05:40 AM
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                                    An elaborate theory of why AMD64 succeededanon2013/08/21 09:04 AM
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                                  OK, let's try and keep this productivePatrick Chase2013/08/21 11:42 PM
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                                    OK, let's try and keep this productivePatrick Chase2013/08/22 09:03 AM
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                            An elaborate theory of why AMD64 succeededCarlie Coats2013/08/21 06:31 AM
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                            An elaborate theory of why AMD64 succeededStubabe2013/08/21 10:37 AM
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                                An elaborate theory of why AMD64 succeededEduardoS2013/08/22 03:25 AM
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                            An elaborate theory of why AMD64 succeededEduardoS2013/08/21 11:58 AM
                            An elaborate theory of why AMD64 succeededanon2013/08/22 01:25 AM
                              An elaborate theory of why AMD64 succeededEduardoS2013/08/22 03:29 AM
                          An elaborate theory of why AMD64 succeededSymmetry2013/08/21 10:51 AM
                            An elaborate theory of why AMD64 succeededStubabe2013/08/21 04:22 PM
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                          No elaborate theories requiredGabriele Svelto2013/08/22 05:28 AM
                            No elaborate theories requiredDoug S2013/08/22 10:03 AM
                          No elaborate theories requiredDavid Hess2013/08/22 02:38 PM
                            No elaborate theories requiredDoug S2013/08/22 03:30 PM
                              No elaborate theories requiredDavid Hess2013/08/23 09:42 AM
                                No elaborate theories requiredanon2013/08/24 02:09 AM
                                  No elaborate theories requiredDavid Hess2013/08/24 05:36 PM
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                          An very bad theory of why AMD64 succeededEduardoS2013/08/23 04:36 AM
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                                                  Separate instruction and data registers BAD or NOT, m68kBrett2013/08/30 06:42 PM
                                                    Separate instruction and data registers BAD or NOT, m68kanon2013/08/30 07:29 PM
                                                      Trade-offs are not constantPaul A. Clayton2013/08/31 10:33 AM
                                                      Separate instruction and data registers BAD or NOT, m68kMichael S2013/08/31 11:42 AM
                                                      Separate instruction and data registers BAD or NOT, m68kBrett2013/08/31 02:51 PM
                                                    Separate instruction and data registers BAD or NOT, m68ksomeone2013/08/30 11:15 PM
                                                      Separate instruction and data registers BAD or NOT, m68kBrett2013/08/31 02:54 PM
                                                      Separate instruction and data registers BAD or NOT, m68kBrett2013/08/31 03:08 PM
                                                        Separate instruction and data registers BAD or NOT, m68kanon2013/08/31 07:43 PM
                                                          Separate instruction and data registers BAD or NOT, m68kMichael S2013/09/01 01:07 AM
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                                                                Partitioned register sets BAD or NOTPatrick Chase2013/09/02 12:06 AM
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                                                            Separate instruction and data registers BAD or NOT, m68kanon2013/09/01 10:12 AM
                                                    Separate instruction and data registers BAD or NOT, m68kRichardC2013/08/31 06:03 AM
                                                    Separate instruction and data registers BAD or NOT, m68kMegol2013/09/04 07:04 AM
                                                      Separate instruction and data registers BAD or NOT, m68kBrett2013/09/04 11:27 PM
                                                        Separate instruction and data registers BAD or NOT, m68kMegol2013/09/05 07:32 AM
                                                          Separate instruction and data registers BAD or NOT, m68kgallier22013/09/05 09:37 AM
                                                            Separate instruction and data registers BAD or NOT, m68kMegol2013/09/05 10:48 AM
                                                          Separate instruction and data registers BAD or NOT, m68kJouni Osmala2013/09/05 11:18 AM
                                                            Separate instruction and data registers BAD or NOT, m68kMegol2013/09/06 05:17 AM
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                                                              John Mashey post is sorta relevant ...Megol2013/09/06 11:59 AM
                                                                John Mashey post is sorta relevant ...Brett2013/09/06 06:32 PM
                                                                  John Mashey post is sorta relevant ...Eugene Nalimov2013/09/08 11:10 AM
                                                                    John Mashey post is sorta relevant ...Brett2013/09/08 02:54 PM
                                                                      John Mashey post is sorta relevant ...David Kanter2013/09/08 05:06 PM
                                                                        John Mashey post is sorta relevant ...Brett2013/09/08 07:48 PM
                                                                          John Mashey post is sorta relevant ...Jouni Osmala2013/09/09 06:26 AM
                                                                            John Mashey post is sorta relevant ...Brett2013/09/13 04:51 PM
                                                                              John Mashey post is sorta relevant ...Megol2013/09/14 09:56 AM
                                                                      John Mashey post is sorta relevant ...Eugene Nalimov2013/09/08 06:59 PM
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                                                    Initial 64-bit ARM *can* run older 32-bit ARM codeLinus Torvalds2013/08/31 11:34 AM
                                                      Initial 64-bit ARM *can* run older 32-bit ARM codeEduardoS2013/08/31 12:26 PM
                                                        Initial 64-bit ARM *can* run older 32-bit ARM codeLinus Torvalds2013/08/31 02:12 PM
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                                                    Initial 64-bit ARM *can* run older 32-bit ARM codegallier22013/08/31 12:15 PM
                              Initial 64-bit ARM *can* run older 32-bit ARM codeRonald Maas2013/08/21 11:54 PM
                                Initial 64-bit ARM *can* run older 32-bit ARM codemas2013/08/22 01:10 AM
                                Initial 64-bit ARM *can* run older 32-bit ARM codeMichael S2013/08/22 02:47 AM
                                  Initial 64-bit ARM *can* run older 32-bit ARM codemas2013/08/22 03:17 AM
                              Initial 64-bit ARM *can* run older 32-bit ARM codeGabriele Svelto2013/08/22 07:53 AM
                      Initial 64-bit ARM *can* run older 32-bit ARM codeMr. Camel2013/08/23 06:33 AM
                        Initial 64-bit ARM *can* run older 32-bit ARM codeMichael S2013/08/23 07:03 AM
                        Initial 64-bit ARM *can* run older 32-bit ARM codeEduardoS2013/08/23 07:39 AM
                          Initial 64-bit ARM *can* run older 32-bit ARM codeRonald Maas2013/08/23 10:13 AM
                            Initial 64-bit ARM *can* run older 32-bit ARM codeEduardoS2013/08/23 10:28 AM
                        Initial 64-bit ARM *can* run older 32-bit ARM coderwessel2013/08/23 10:14 PM
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              Mixing 32b and 64b code in a kernelDoug S2013/08/16 09:50 AM
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                  LPAE is here now!Patrick Chase2013/08/16 12:29 PM
                    LPAE is here now!anon2013/08/16 06:11 PM
                Mixing 32b and 64b code in a kernelRicardo B2013/08/17 10:52 AM
                  Mixing 32b and 64b code in a kernelLinus Torvalds2013/08/17 11:09 AM
                    Mixing 32b and 64b code in a kernelMax2013/08/18 02:57 PM
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                  How does Power compare to ARM / MIPS?Patrick Chase2013/08/15 09:01 PM
                How does Power compare to ARM / MIPS?Jukka Larja2013/08/16 06:54 AM
          How does Power compare to ARM / MIPS?Patrick Chase2013/08/15 07:29 PM
            How does Power compare to ARM / MIPS?Brett2013/08/16 11:34 PM
              How does Power compare to ARM / MIPS?Doug S2013/08/17 11:18 AM
                How does Power compare to ARM / MIPS?Brett2013/08/17 11:35 AM
                  16 vs 32 general purpose registersMark Roulo2013/08/17 11:40 AM
                    16 vs 32 general purpose registersMichael S2013/08/17 02:55 PM
                      16 vs 32 general purpose registersPatrick Chase2013/08/18 04:55 AM
                  How does Power compare to ARM / MIPS?EduardoS2013/08/17 05:30 PM
                How does Power compare to ARM / MIPS?Patrick Chase2013/08/17 12:49 PM
                  > 32 general purpose registersMark Roulo2013/08/17 01:58 PM
                    > 32 general purpose registersMichael S2013/08/17 02:25 PM
                    > 32 general purpose registersPatrick Chase2013/08/17 03:11 PM
                      > 32 general purpose registersExophase2013/08/18 10:17 AM
                        IIRC, AArch32 registers (shadow registers et al.) map onto AArch64 registers (NT)Paul A. Clayton2013/08/18 02:51 PM
                          IIRC, AArch32 registers (shadow registers et al.) map onto AArch64 registersExophase2013/08/18 09:28 PM
                            IIRC, AArch32 registers (shadow registers et al.) map onto AArch64 registersMichael S2013/08/19 02:17 AM
                              IIRC, AArch32 registers (shadow registers et al.) map onto AArch64 registersExophase2013/08/19 08:42 AM
                    > 32 general purpose registersDoug S2013/08/18 12:21 AM
        How does Power compare to ARM / MIPS?Brett2013/08/17 11:20 AM
          How does Power compare to ARM / MIPS?Gabriele Svelto2013/08/18 02:12 PM
            How does Power compare to ARM / MIPS?Exophase2013/08/18 09:35 PM
          How does Power compare to ARM / MIPS?mas2013/08/20 03:29 PM
      How does Power compare to ARM / MIPS?mas2013/08/20 03:15 PM
        How does Power compare to ARM / MIPS?none2013/08/20 03:31 PM
          How does Power compare to ARM / MIPS?mas2013/08/20 04:08 PM
        How does Power compare to ARM / MIPS?Linus Torvalds2013/08/20 03:49 PM
          How does Power compare to ARM / MIPS?mas2013/08/20 05:53 PM
            How does Power compare to ARM / MIPS?Linus Torvalds2013/08/20 07:52 PM
              How does Power compare to ARM / MIPS?mas2013/08/21 12:21 AM
                How does Power compare to ARM / MIPS?Michael S2013/08/21 06:17 AM
                  How does Power compare to ARM / MIPS?mas2013/08/21 07:05 AM
                    How does Power compare to ARM / MIPS?Michael S2013/08/21 07:27 AM
                      How does Power compare to ARM / MIPS?none2013/08/21 07:53 AM
                        How does Power compare to ARM / MIPS?Michael S2013/08/21 08:02 AM
                          XScale wasn't synthesizablePatrick Chase2013/08/21 12:36 PM
                            XScale wasn't synthesizableMichael S2013/08/21 02:00 PM
                              XScale wasn't synthesizablePatrick Chase2013/08/21 03:02 PM
                              XScale wasn't synthesizablePatrick Chase2013/08/21 03:11 PM
                      How does Power compare to ARM / MIPS?mas2013/08/21 08:45 AM
                  How does Power compare to ARM / MIPS?mas2013/08/22 04:08 AM
            How does Power compare to ARM / MIPS?Doug S2013/08/20 10:47 PM
              How does Power compare to ARM / MIPS?Michael S2013/08/21 07:32 AM
              How does Power compare to ARM / MIPS?Patrick Chase2013/08/21 08:37 AM
              How does Power compare to ARM / MIPS?Patrick Chase2013/08/21 11:45 AM
                How does Power compare to ARM / MIPS?EduardoS2013/08/21 12:02 PM
                  How does Power compare to ARM / MIPS?Patrick Chase2013/08/21 12:27 PM
                    How does Power compare to ARM / MIPS?Patrick Chase2013/08/21 12:47 PM
                      Is simplistic prediction still prediction?Paul A. Clayton2013/08/21 03:59 PM
                        Is simplistic prediction still prediction?Patrick Chase2013/08/22 12:16 PM
                          More like always not-taken, but yeah lame prediction (NT)Paul A. Clayton2013/08/22 01:27 PM
                      How does Power compare to ARM / MIPS?Linus Torvalds2013/08/21 04:25 PM
                        Athlon did something similar (but no dirty special case)Paul A. Clayton2013/08/21 07:47 PM
                          Athlon did something similar (but no dirty special case)Patrick Chase2013/08/22 12:13 PM
                        How does Power compare to ARM / MIPS?Patrick Chase2013/08/22 11:56 AM
                        How does Power compare to ARM / MIPS?Patrick Chase2013/08/22 12:29 PM
                          How does Power compare to ARM / MIPS?Linus Torvalds2013/08/22 01:40 PM
                    How does Power compare to ARM / MIPS?anon2013/08/22 12:45 AM
                      How does Power compare to ARM / MIPS?Niels Jørgen Kruse2013/08/22 02:38 AM
                        How does Power compare to ARM / MIPS?Michael S2013/08/22 02:58 AM
                      How does Power compare to ARM / MIPS?Patrick Chase2013/08/22 08:44 AM
                        Are you sure P4 used IP-based way prediction?Paul A. Clayton2013/08/22 02:04 PM
                          Are you sure P4 used IP-based way prediction?Patrick Chase2013/08/22 03:40 PM
                        How does Power compare to ARM / MIPS?Patrick Chase2013/08/24 10:19 AM
                          How does Power compare to ARM / MIPS?Anon2013/08/25 01:15 AM
                            How does Power compare to ARM / MIPS?Patrick Chase2013/08/25 07:49 PM
                              Replay tornadoes? Paul A. Clayton2013/08/25 08:43 PM
                        How does Power compare to ARM / MIPS?anon2013/08/25 04:22 PM
                          How does Power compare to ARM / MIPS?anonymou52013/08/25 04:35 PM
                            I have the date and topic for a P4 Dcache postPaul A. Clayton2013/08/25 08:34 PM
                              Obviously that should have been "anonymous (no@spam.com)" (NT)Paul A. Clayton2013/08/25 08:45 PM
                              I have the date and topic for a P4 Dcache postPatrick Chase2013/08/26 09:04 AM
                                Could you provide a link?Paul A. Clayton2013/08/26 10:32 AM
                                  Could you provide a link?Patrick Chase2013/08/26 10:43 AM
                                    Thanks. I had a text copy without url.Paul A. Clayton2013/08/26 03:20 PM
                                      Thanks. I had a text copy without url.Patrick Chase2013/08/26 06:53 PM
                            How does Power compare to ARM / MIPS?anon2013/08/25 09:37 PM
                              How does Power compare to ARM / MIPS?David Kanter2013/08/26 02:31 PM
                              How does Power compare to ARM / MIPS?Patrick Chase2013/08/27 05:11 PM
                                I think even later P4s used width pipelining (NT)Paul A. Clayton2013/08/27 06:20 PM
    How does Power compare to ARM / MIPS?Vincent Diepeveen2013/08/26 05:04 AM
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