Michael S (already5chosen.delete@this.yahoo.com) on January 5, 2014 3:42 am wrote:
> Eric Bron (eric.bron.delete@this.zvisuel.privatefortest.com) on January 4, 2014 5:20 pm wrote:
> > > How much energy does a L1D read cost? How much energy does reading a register cost? It
> >
> > > > my understanding is that it's L1D read energy register file read energy store forwarding buffer read energy
> > for this reason I'm skeptical the data are all effectively read from the L1D in my example with redundant
> > load addresses, if they are read from a buffer it will explain why the compiler chose to do it this way
>
> Sounds like you are giving to compiler writers too much credit.
> I am pretty sure that they are not thinking in terms of energy at all. Also,
> they probably shouldn't think in this terms since compiler does not have
> enough of information for really intelligent decisions in this area.
> For example, it can't know whether the loop in question runs for seconds, thus influencing chip's
> temperature, or for microseconds, not influencing anything at all. It can't know whether cooling solution
> is standard or over-provisioned. It can't know what's going on on the other cores. Etc...
>
> Besides, for lesser extent, you had already seen similar icc behavior when the targeting
> SandyBridge and already measured by itself that it was moderately harmful.
>
> So, I'd suggest to hear to Linus: "Compilers aren't "smart". Never have
> been, and while they possibly some day may be, that day is not close."
>
> BTW, back when he said that it also was in reaction to discussion about uber-aggressive load+op merging.
>
> http://www.realworldtech.com/forum/?threadid=120182&curpostid=120396

Did you look at the actual code? You're right that typical compilers don't take power consumption into account, but I haven't seen a compiler not reuse previously loaded data like that in a long time. It's a pretty basic optimization. What's more this is coming from the Intel compiler and they would be the least likely to miss an optimization like that. So it seems like a deliberate choice to generate the code that way.

If there's an L0 cache for recently accessed data, then that's actually more power efficient than reading the register file. Hence that would make this a compiler which optimizes for power.