No dynamic predication yet, I suspect

By: Maynard Handley (name99.delete@this.name99.org), January 23, 2014 8:51 am
Room: Moderated Discussions
Patrick Chase (patickjchase.delete@this.gmail.com) on January 22, 2014 11:36 pm wrote:
> Exophase (exophase.delete@this.gmail.com) on January 22, 2014 12:29 am wrote:
> > Personally I don't know the first thing about state of the art branch prediction. Techniques
> > first used over 10 years ago still strike me as quite complex. But I have to wonder if the focus
> > has not shifted away from trying to knock down the last few percent of unpredicted branches in
> > some workloads and more towards trying to avoid doing a lot of work predicting the branches that
> > could be predicted with simple heuristics.
>
> One way to roughly assess whether this is the case is to look at ROB sizes (i.e. instruction
> window sizes). Branch prediction accuracy imposes an upper limit on the usable ROB size, because
> mispredicts cause ROB flushes (albeit partial flushes in SB/IB/Haswell). It would be pointless
> to design an ROB that's larger than the average number of instructions per mispredicted branch,
> and you'd probably want the latter to be quite a bit larger than the ROB size.

This assumes that what's governing the ROB size is branch prediction. I don't believe that is the case.
As far as I can tell
- with current predictors, there's value in a ROB of at least five or six hundred instructions, perhaps a thousand. (That is, with misprediction accuracy as it is, you can go about that far and still have a reasonable chance of executing instructions that won't later be voided.)
- the actual gating factor is the size of the instruction window, and the power it takes to search through it to find instructions that meet issue criteria. The rule of thumb seems to be that the ROB should be about 3x the size of this window, and the window is made as big as power/clock will allow. That's why the starting point of schemes like KIP or CFP is always to shunt "waiting" instructions out of the window to some holding silo while they wait for their load to be delivered. That way they can keep the "active" part of the window at around 60 instructions, while not wasting that space on long chains of instructions that aren't going to execute for another 200 cycles.

I suspect you are right, that misprediction has about halved over the past eight or so years; but not for the reasons you cite.
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TopicPosted ByDate
Some cinebench scores and IPCTimothy McCaffrey2014/01/17 09:27 PM
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      Is Cinebench a totally useless benchmark?Alberto2014/01/19 02:08 PM
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        Is Cinebench a totally useless benchmark?Maynard Handley2014/01/19 10:26 PM
          Is Cinebench a totally useless benchmark?Exophase2014/01/19 11:01 PM
            Is Cinebench a totally useless benchmark?Maynard Handley2014/01/20 03:25 AM
              Is Cinebench a totally useless benchmark?Patrick Chase2014/01/21 10:13 AM
                Is Cinebench a totally useless benchmark?Patrick Chase2014/01/21 12:31 PM
          Is Cinebench a totally useless benchmark?Patrick Chase2014/01/21 09:19 AM
            Intel and branch predictionDavid Kanter2014/01/21 10:26 AM
              Intel and branch predictionMaynard Handley2014/01/21 08:52 PM
                Intel and branch predictionMaynard Handley2014/01/21 09:14 PM
                No dynamic predication yet, I suspectPaul A. Clayton2014/01/21 10:04 PM
                  No dynamic predication yet, I suspectExophase2014/01/22 12:29 AM
                    No dynamic predication yet, I suspectdmcq2014/01/22 05:24 AM
                    No dynamic predication yet, I suspectPatrick Chase2014/01/22 11:36 PM
                      No dynamic predication yet, I suspectMaynard Handley2014/01/23 08:51 AM
                        No dynamic predication yet, I suspectPatrick Chase2014/01/23 11:59 AM
                          No dynamic predication yet, I suspectPatrick Chase2014/01/23 12:01 PM
                          16 misses per core on Haswell?David Kanter2014/01/23 06:10 PM
                            16 misses per core on Haswell?Patrick Chase2014/01/23 08:12 PM
                          No dynamic predication yet, I suspectPatrick Chase2014/01/27 06:34 PM
                            Fixed link to paperPaul A. Clayton2014/01/28 08:51 AM
                        No dynamic predication yet, I suspectPatrick Chase2014/01/23 12:29 PM
                      SMT influence on ROB size?Paul A. Clayton2014/01/23 11:26 AM
                        SMT influence on ROB size?Patrick Chase2014/01/23 08:40 PM
    Is Cinebench a totally useless benchmark?Exophase2014/01/19 07:44 PM
    Is Cinebench a totally useless benchmark?anon2014/01/19 08:43 PM
      Is Cinebench a totally useless benchmark?Timothy McCaffrey2014/01/20 04:24 PM
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