By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), August 9, 2014 1:47 pm
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on August 9, 2014 9:55 am wrote:
[snip]
> x86 overheads are noticeable and depend on the target market. As you pointed out, it's not very attractive
> for microcontrollers at all...but for a high performance core, the difference is perhaps 5-10% of the core
> area. And in most SoCs, cores are around 25-40% of the total area. 10% of 40% is 4% - and that's best case.
Of course area and transistor count are not great measures of complexity and are not even ideal for estimating incremental manufacturing costs.
Some of x86's extra complexity may even measurably additionally impact incremental costs by increasing chip testing time. The advantage (and disadvantage) of AArch64's lower complexity would seem to be largely in the design effort. (This can be a disadvantage in that lower entry costs facilitates competition. I think this effect may have been significant in the history of RISC which fragmented not only chip designers but also ISAs.)
I would also guess that Intel's IDM advantage is part of the reason it can make unusually dense SRAM. While SRAM density might be the IDM circuit-design advantage that is most obvious to outsiders, there are presumably other examples (the random number generator circuitry might be an example). Lower power SRAM (or eDRAM) could have a significant impact on energy efficiency, and the IDM advantage would presumably apply there as well (aside from the energy benefits of greater density).
I also was under the impression that Intel is very experienced in design for manufacturing even apart from the IDM factor. This presumably gives Intel yet another advantage.
[snip]
> x86 overheads are noticeable and depend on the target market. As you pointed out, it's not very attractive
> for microcontrollers at all...but for a high performance core, the difference is perhaps 5-10% of the core
> area. And in most SoCs, cores are around 25-40% of the total area. 10% of 40% is 4% - and that's best case.
Of course area and transistor count are not great measures of complexity and are not even ideal for estimating incremental manufacturing costs.
Some of x86's extra complexity may even measurably additionally impact incremental costs by increasing chip testing time. The advantage (and disadvantage) of AArch64's lower complexity would seem to be largely in the design effort. (This can be a disadvantage in that lower entry costs facilitates competition. I think this effect may have been significant in the history of RISC which fragmented not only chip designers but also ISAs.)
I would also guess that Intel's IDM advantage is part of the reason it can make unusually dense SRAM. While SRAM density might be the IDM circuit-design advantage that is most obvious to outsiders, there are presumably other examples (the random number generator circuitry might be an example). Lower power SRAM (or eDRAM) could have a significant impact on energy efficiency, and the IDM advantage would presumably apply there as well (aside from the energy benefits of greater density).
I also was under the impression that Intel is very experienced in design for manufacturing even apart from the IDM factor. This presumably gives Intel yet another advantage.