By: Jouni Osmala (josmala.delete@this.cc.hut.fi), August 10, 2014 5:53 am
Room: Moderated Discussions
dmcq (dmcq.delete@this.fano.co.uk) on August 10, 2014 5:09 am wrote:
> Jouni Osmala (josmala.delete@this.cc.hut.fi) on August 10, 2014 4:27 am wrote:
> > > >
>
> > The most often forgotten cost is how good JIT target is x86 vs the competing architecture. By
> > being simpler JIT target means it reduces cost of running a jitted language in architecture.
> >
> You mean because other architectures require the code to be explicitly moved to the instruction cache
> from the data cache instead of the hardware always looking out for that? For a short generated sequence
> one has to explicitly say the data cache lines need to be clean and then invalidate the addresses
> in the instruction cache. It is hardly the end of the world especially considering the cost of generating
> the code. Have you considered the cost of having to check for unexpected data writes which might
> affect the instruction cache on an x86 - and that affects it all the time.
I mean creating good sequence of x86 instructions takes more work for a program than generating equally good sequence of 64bit arm instructions. With offline compilers it doesn't matter much but with JIT that work is done at runtime.
The orthogonality of encoding and non-destructive operands, being fixed size AND having more registers helps generating reasonable code quickly.
> Jouni Osmala (josmala.delete@this.cc.hut.fi) on August 10, 2014 4:27 am wrote:
> > > >
>
> > The most often forgotten cost is how good JIT target is x86 vs the competing architecture. By
> > being simpler JIT target means it reduces cost of running a jitted language in architecture.
> >
> You mean because other architectures require the code to be explicitly moved to the instruction cache
> from the data cache instead of the hardware always looking out for that? For a short generated sequence
> one has to explicitly say the data cache lines need to be clean and then invalidate the addresses
> in the instruction cache. It is hardly the end of the world especially considering the cost of generating
> the code. Have you considered the cost of having to check for unexpected data writes which might
> affect the instruction cache on an x86 - and that affects it all the time.
I mean creating good sequence of x86 instructions takes more work for a program than generating equally good sequence of 64bit arm instructions. With offline compilers it doesn't matter much but with JIT that work is done at runtime.
The orthogonality of encoding and non-destructive operands, being fixed size AND having more registers helps generating reasonable code quickly.