By: juanrga (nospam.delete@this.juanrga.com), August 10, 2014 5:19 am
Room: Moderated Discussions
carop (carop.delete@this.somewhere.org) on August 10, 2014 2:01 am wrote:
> >
> > AMD has already announced a custom ARM64 server core for 2016, so yes it will be like
> > one of those little companies such as Broadcomm designing Haswell-class server CPUs.
> >
>
> It is a bit misleading to label Broadcom as a little company. They
> are one of the top 10 semiconductor companies by revenue:
>
> http://www.icinsights.com/news/bulletins/MediaTek-AMD-And-SK-Hynixs-1H14-Sales-Surge-By-20/
>
> They have a number of MIPS based processors that are used in their data networking and wireless
> equipment. Their custom ARMv8 core appears to build on the XLP CPU which is 4-context 4-issue.
>
It is a heavy modification of the XLP: fetch is increased to eight instructions per cycle and issue to six per cycle, 40% larger ROB, load bandwidth is doubled, three extra pipeline stages and other improvements give 50% higher clock target, FPU is increased from 64bit to 256bit...
> >
> > AMD has already announced a custom ARM64 server core for 2016, so yes it will be like
> > one of those little companies such as Broadcomm designing Haswell-class server CPUs.
> >
>
> It is a bit misleading to label Broadcom as a little company. They
> are one of the top 10 semiconductor companies by revenue:
>
> http://www.icinsights.com/news/bulletins/MediaTek-AMD-And-SK-Hynixs-1H14-Sales-Surge-By-20/
>
> They have a number of MIPS based processors that are used in their data networking and wireless
> equipment. Their custom ARMv8 core appears to build on the XLP CPU which is 4-context 4-issue.
>
It is a heavy modification of the XLP: fetch is increased to eight instructions per cycle and issue to six per cycle, 40% larger ROB, load bandwidth is doubled, three extra pipeline stages and other improvements give 50% higher clock target, FPU is increased from 64bit to 256bit...
