By: Jouni Osmala (josmala.delete@this.cc.hut.fi), August 11, 2014 12:14 pm
Room: Moderated Discussions
> > UNLESS your workload depends on fast transformation of three
> > operand instructions to target ISA, which has quite an advantage on ARM side.
> >
>
> You mean, interpreter of legacy binaries?
> Isn't AOT/JIT combinations pretty much the only option for high performance anyway?
> Of course, Intel's FP is already three-operand. And their integer
> ISA has 3-operand form (LEA) for most frequently used instructions.
I mean JIT and other things that generate executable code. And thee operand instructions in is the internal representation of program in multiple text books, and looks like in some production compilers also.
Generating x86 binary code is terrible. No nice separation of fields but couple of bits here other bits there. Variable length crap that makes generating it a mess.
Then the limitation on register usage.
I just hate X86 for the complexity of generating executable code for it. Luckily LLVM temporarily removed that pain until I really need to get last drop of performance.
With a clean ISA generating code can be nice and so fast that in many cases you could skip interpreting phase of an JIT-interpreter combo where on x86 you would interpret first and only compile the code you actually execute a lot.
> > operand instructions to target ISA, which has quite an advantage on ARM side.
> >
>
> You mean, interpreter of legacy binaries?
> Isn't AOT/JIT combinations pretty much the only option for high performance anyway?
> Of course, Intel's FP is already three-operand. And their integer
> ISA has 3-operand form (LEA) for most frequently used instructions.
I mean JIT and other things that generate executable code. And thee operand instructions in is the internal representation of program in multiple text books, and looks like in some production compilers also.
Generating x86 binary code is terrible. No nice separation of fields but couple of bits here other bits there. Variable length crap that makes generating it a mess.
Then the limitation on register usage.
I just hate X86 for the complexity of generating executable code for it. Luckily LLVM temporarily removed that pain until I really need to get last drop of performance.
With a clean ISA generating code can be nice and so fast that in many cases you could skip interpreting phase of an JIT-interpreter combo where on x86 you would interpret first and only compile the code you actually execute a lot.