By: Mark Roulo (nothanks.delete@this.xxx.com), August 14, 2014 8:30 am
Room: Moderated Discussions
David Kanter (dkanter.delete@this.realworldtech.com) on August 13, 2014 11:47 am wrote:
> > > According to Feldman an entirely custom server chip using the ARM architecture takes about 18 months
> > > and about $30 million. By contrast, it takes three or four-year time frame and $300--400 million in
> > > development costs required to build an x86-based server chip based on a new micro-architecture.
> >
> > An interesting video confirms what you are saying. Search for: Jim
> > Keller On AMD's Next-Gen High Performance x86 & K12 ARM Cores.
> >
> > Saw this couple of months, but if my memory serves me correctly, he said that with the
> > same transistor budget he is able to build a faster core with Aarch64 than with x86_64.
> > Time will tell if that is true, but Jim seems to know what he is talking about.
>
> Jim is 100% right - it is a bit easier to design an ARMv8 core than
> x86, all things being equal. How much is the difference though?
>
> I wrote about this extensively before:
>
> http://www.realworldtech.com/microservers/4/
>
> My analysis is as follows: assume a 15% gain for an ARM core vs. x86 (I think 5-10% is more realistic, but
> let's be generous), that is only a 5% gain at the chip level. 5% just isn't a significant advantage.
It won't matter for the folks that think that the ARM ISA provide a huge advantage when designing 10+ Watt chips, but ... about 10-ish years ago Microprocessor Report had an article that included a discussion with one of the POWER architects. He mentioned that for the space that POWER was competing, the ISA didn't matter enough(*) to be worth getting worked up over. It would be interesting to see if there was any elaboration (because I'm going off 10+ year old memory here), but that would require access to the article. Googling hasn't turned up anything (which isn't much of a surprise). This *IS* an argument from authority, but in this case armchair analysis by folks who have never built a high performance CPU is pretty suspect :-)
(*) The implication was that the ISA wasn't a complete performance killer. A register-to-register architecture with only two registers would obviously be a non-trivial disadvantage. So might an ISA that *required* sequential instruction decoding (the 68K family was supposed to have this problem).
> > > According to Feldman an entirely custom server chip using the ARM architecture takes about 18 months
> > > and about $30 million. By contrast, it takes three or four-year time frame and $300--400 million in
> > > development costs required to build an x86-based server chip based on a new micro-architecture.
> >
> > An interesting video confirms what you are saying. Search for: Jim
> > Keller On AMD's Next-Gen High Performance x86 & K12 ARM Cores.
> >
> > Saw this couple of months, but if my memory serves me correctly, he said that with the
> > same transistor budget he is able to build a faster core with Aarch64 than with x86_64.
> > Time will tell if that is true, but Jim seems to know what he is talking about.
>
> Jim is 100% right - it is a bit easier to design an ARMv8 core than
> x86, all things being equal. How much is the difference though?
>
> I wrote about this extensively before:
>
> http://www.realworldtech.com/microservers/4/
>
> My analysis is as follows: assume a 15% gain for an ARM core vs. x86 (I think 5-10% is more realistic, but
> let's be generous), that is only a 5% gain at the chip level. 5% just isn't a significant advantage.
It won't matter for the folks that think that the ARM ISA provide a huge advantage when designing 10+ Watt chips, but ... about 10-ish years ago Microprocessor Report had an article that included a discussion with one of the POWER architects. He mentioned that for the space that POWER was competing, the ISA didn't matter enough(*) to be worth getting worked up over. It would be interesting to see if there was any elaboration (because I'm going off 10+ year old memory here), but that would require access to the article. Googling hasn't turned up anything (which isn't much of a surprise). This *IS* an argument from authority, but in this case armchair analysis by folks who have never built a high performance CPU is pretty suspect :-)
(*) The implication was that the ISA wasn't a complete performance killer. A register-to-register architecture with only two registers would obviously be a non-trivial disadvantage. So might an ISA that *required* sequential instruction decoding (the 68K family was supposed to have this problem).
