juanrga (nospam.delete@this.juanrga.com) on August 16, 2014 12:55 pm wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on August 16, 2014 12:43 pm wrote:
> > juanrga (nospam.delete@this.juanrga.com) on August 16, 2014 4:55 am wrote:
> > > dmcq (dmcq.delete@this.fano.co.uk) on August 16, 2014 3:53 am wrote:
> > > > Ronald Maas (rmaas.delete@this.wiwo.nl) on August 15, 2014 11:14 pm wrote:
> > > > .....
> > > > >
> > > > > So for now AMD and Applied Micro would be my pick for the top dogs in the ARM server space.
> > > > > First generation seems to be good enough to generate some revenue and to start the ball rolling.
> > > > > But 2nd or 3rd generation is going to be critical for real longer term success.
> > > > >
> > > > > May you live in interesting times
> > > >
> > > > I'm not altogether sure about AMD. It doesn't have a pot
> > > > of money or another business it can use the processors
> > > > in. Broadcom and Applied Micro for instance can use their processors in their core business and Broadcom
> > > > has got money. The big deciding factor I think in the end
> > > > will be how good they are in fitting into particular
> > > > market segments or whether they are good at producing SoCs with their processor in as a component for large
> > > > customers. At least AMD have got expertise in that with their games chips. Producing general purpose server
> > > > chips and directly competing against Intel will be difficult, but the widest reasonably accessible market
> > > > like that is web servers with good networking - and that does have real possibilities.
> > >
> > > http://www.techrepublic.com/blog/data-center/arms-battle-for-the-datacentre-the-contenders/
> > >
> > >

Rather than just web serving, these systems are being built to also power data analytics
> > > on Hadoop clusters, fetch and put data in NoSQL data stores, streaming media and high-performance
> > > computing, sharing processing duties with GPUs, FPGAs or ASICs.

> > >
> > > > The comparison with spec benchmarks to top level Xeons is a bit beside the point. The POWER processors
> > > > are already in that market and it isn't really sensible to go up against that as a first aim. It
> > > > isn't the mass market ARM has been in. As to RAS etc features though ARM has had a bit of experience
> > > > in real time control with things like three synchronized processors working at the same time on
> > > > the same data. The requirements for even tiny processors can very stringent indeed.
> > >
> > > Microprocessor report estimates that Cavium 80W (estimated) SoC will score 350 on SPECint_2006. They
> > > give 320 score for the 95W Xeon E5-2470 v2. Regarding efficiency, Microprocessor report writes:
> > >
> >
> > That's already the same or worse SPECint_2006/W then many Intel's year old Xeon E3L processors:
> > E3-1285L v3: SPECint_2006=210, 65 W
> > E3-1265L v3: SPECint_2006=194, 45 W
> > E3-1230L v3: SPECint_2006=168, 25 W
> >
> > So, Cavium has to execute perfectly just to come close to *old* Xeon E3s!
> >
> > Comparison with Xeon-E5 is not quite fair, because, unlike Cavium's chip, it can
> > run in dual-socket SMP configuration. which is not free power-wise. But even in mostly
> > year-old Xeon-E5 lineup there are chips with similar SPECint_2006/W scores:
> >
> > Xeon E5-2650L v2: SPECint_2006=291, 70 W
> > Xeon E5-2450L v2: SPECint_2006=281, 60 W
> > Xeon E5-2630L v2: SPECint_2006=237, 60 W
> > Xeon E5-2660 v2: SPECint_2006=381, 95 W
> > Xeon E5-2650 v2: SPECint_2006=352, 95 W
> > Xeon E5-2697 v2: SPECint_2006=488, 130 W
> >
>
> They gave the TDP for the whole SoC, not only the CPU. Your above numbers are avoiding rest
> of needed circuits that sum up to dissipation and power consumption.

Intel TDP includes plenty of PCIe lanes. I didn't look at Cavium, but will guess that they don't have quite the same amount like E5, at best they can match E3.

> Also for the SPECint
> scores they used non-biased benchmark. No sure that compiler was used for your scores.
>

That's crap argument. It wouldn't lead us to fruitful discussion. Either we are beliving in SPECInt_rate or we are not. You can't believe in Cavium and at the same time disbelieve to Intel.

Anyway, SPECInt_rate is absolutely worst benchmark for Intel core cache architecture. It misses all real-world advantages of shared LLC with near-uniform latency and emphasizes all disadvantages of both shared LLC and of relatively small L2.