By: Ricardo B (ricardo.b.delete@this.xxxxx.xx), August 17, 2014 12:41 pm
Room: Moderated Discussions
Maynard Handley (name99.delete@this.name99.org) on August 17, 2014 12:24 pm wrote:
> (c) Cyclone DOES have zero cycle movs and zeroing.
> From the LLVM code we have:
> /// Cyclone has register move instructions which are "free".
> def FeatureZCRegMove : SubtargetFeature;
>
> /// Cyclone has instructions which zero registers for "free".
> def FeatureZCZeroing : SubtargetFeature;
>
> I don't know what you thought I meant by this, but how I interpret what Cyclone
> is doing is that movs (and, as I said, zeroing as a variant on mov) are handled
> completely at the rename stage. After the rename, the op is done.
That's.. interesting.
Handling zeroing idoms (including mov rx, r0) is common.
But I do wonder why they bother handling the general case of mov reg, reg like that for AArch64.
A non-brain dead compiler should avoid most, if not all, of the unnecessary mov reg, reg.
> (c) Cyclone DOES have zero cycle movs and zeroing.
> From the LLVM code we have:
> /// Cyclone has register move instructions which are "free".
> def FeatureZCRegMove : SubtargetFeature;
>
> /// Cyclone has instructions which zero registers for "free".
> def FeatureZCZeroing : SubtargetFeature;
>
> I don't know what you thought I meant by this, but how I interpret what Cyclone
> is doing is that movs (and, as I said, zeroing as a variant on mov) are handled
> completely at the rename stage. After the rename, the op is done.
That's.. interesting.
Handling zeroing idoms (including mov rx, r0) is common.
But I do wonder why they bother handling the general case of mov reg, reg like that for AArch64.
A non-brain dead compiler should avoid most, if not all, of the unnecessary mov reg, reg.
