By: Paul A. Clayton (paaronclayton.delete@this.gmail.com), August 26, 2014 1:28 pm
Room: Moderated Discussions
Aaron Spink (aaronspink.delete@this.notearthlink.net) on August 26, 2014 4:41 am wrote:
[snip]
> For an ISA definition, I would much rather have the hard primitives like CMPXCHG such that you have the
> potential for much more optimization.
While not the ideal way of expressing intend, I would think that idiom recognition would be possible (at least for large implementations). If a particular subset of registers was used to hint that this was a use of LL/SC susceptible to such specific optimization, only the LL would need to be examined to initiate (with low probability of misprediction due to the nature of the hint) the optimized action. Even without such a hint, I would guess that idiom recognition would not be extraordinarily difficult.
[snip]
> Basically I look at LL/SC these days as a rather poor and broken implementation
> of transactional memory, with many of the downsides and none of the advantages.
I find a certain attraction to providing LL/SC as a base for transactional memory such that fewer new instructions would be needed for full-featured TM and a simple implementation could have a low cost reasonably flexible operation. (Some of the traditional restrictions on LL/SC seem excessive. E.g., only requiring the SC to be within the same reservation granule as the LL, with an architectural guarantee of at least 32B granule size, seems reasonable.) Even on simple implementations, I suspect that a more flexible mechanism would not be excessively expensive even something a little more complex than Cliff Click's "I wanna bit!". (An LL that initiated a transaction that aborted on any cache eviction ["I wanna bit!" proposed such a limited TM mechanism] but excluded a miss on the LL and its cache line might be useful and not unduly burden a low-end system. Without caches such would add more overhead, perhaps using a filter to monitor the transaction.)
[snip]
> For an ISA definition, I would much rather have the hard primitives like CMPXCHG such that you have the
> potential for much more optimization.
While not the ideal way of expressing intend, I would think that idiom recognition would be possible (at least for large implementations). If a particular subset of registers was used to hint that this was a use of LL/SC susceptible to such specific optimization, only the LL would need to be examined to initiate (with low probability of misprediction due to the nature of the hint) the optimized action. Even without such a hint, I would guess that idiom recognition would not be extraordinarily difficult.
[snip]
> Basically I look at LL/SC these days as a rather poor and broken implementation
> of transactional memory, with many of the downsides and none of the advantages.
I find a certain attraction to providing LL/SC as a base for transactional memory such that fewer new instructions would be needed for full-featured TM and a simple implementation could have a low cost reasonably flexible operation. (Some of the traditional restrictions on LL/SC seem excessive. E.g., only requiring the SC to be within the same reservation granule as the LL, with an architectural guarantee of at least 32B granule size, seems reasonable.) Even on simple implementations, I suspect that a more flexible mechanism would not be excessively expensive even something a little more complex than Cliff Click's "I wanna bit!". (An LL that initiated a transaction that aborted on any cache eviction ["I wanna bit!" proposed such a limited TM mechanism] but excluded a miss on the LL and its cache line might be useful and not unduly burden a low-end system. Without caches such would add more overhead, perhaps using a filter to monitor the transaction.)
