juanrga (nospam.delete@this.juanrga.com) on August 27, 2014 4:10 am wrote:
> David Kanter (dkanter.delete@this.realworldtech.com) on August 26, 2014 6:25 pm wrote:
> > > Intel is not targeting "real" 14nm. Intel deviated from ITRS
> > > rules years ago, what they call 14nm is "real" ~16nm.
> > >
> > > TSMC and Glofo/Samsung are playing by same rules than Intel now, just to avoid
> > > marketing abuse from Intel. As Scott Thompson (former Intel fellow) said: "Intel's
> > > 22nm node is really 26nm, so if Intel does new math, so will we."
> > >
> > > What part of Intel 14nm is only about half-node away from TSMC 16nm is not stil understood?
> >
> > Repeat after me: The name of the node (e.g., 32nm, 16nm, 14nm, etc.) is simply
> > marketing. Until you understand that, you are frankly just wallowing in your
> > own ignorance and making yourself look bad and annoying the rest of us.
> >
> > It doesn't matter whether you call it 14nm, 16nm, 15nm or a zebra. What matters is:
> >
> > 1. Contacted gate pitch
> > 2. Minimum metal pitch
> > 3. Ion vs. Ioff curves for NFETs and PFETs
> > 4. Design rule restrictions
> > 5. Metal performance
> > 6. Unique features e.g., eDRAM, high density capacitors, etc.
> > 7. Yield
> > 8. Time to market for comparable products
> > 9. SRAM density
> >
> > Fortunately, #1,2,3,6, & 9 are often disclosed at VLSI or IEDM.
> >
> > Historically Intel was ahead on CGP and SRAM density, but behind on metal pitch (because
> > they optimized for RC delay instead of density). With 14nm, Intel will be ahead on
> > density as well, because the foundries are all using 20nm metal back-ends.
> >
> > The difference between Intel and TSMC should be judged on the basis
> > of 1-9, not on the basis of BS marketing slides you've seen.
> >
> > David
>
> I find insulting the condescending tone of your post, specially when you are trying to say me what
> I said before in this forum. I will try to write it again because you somewhat lose my posts.
>
> Once again: TSMC "16nm" is so marketing label as Intel "14nm" is. I will copy-paste:
>
>

What TSMC/IBM/Samsung/GF said is:
>
> We call these processes 14nm / 16nm because:
> Intel deviated from the official ITRS process naming rules and Intel
> marketing/shareholders always abuse this against us to claim they
> are many, many years ahead.
>
> Indeed, based on BEOL density Intel's processes should have been called
> differently according to the official ITRS naming standards:
>
> Intel's 65nm should have been called 80nm instead.
> Intel's 45nm should have been called 55nm instead.
> Intel's 32nm should have been called 39nm instead.
>
> You can see this in the graph below:
>
> -The blue squares show the official metal 1 half pitches according to the ITRS.
> -The purple circles and squares are the actual BEOL metal 1 half pitches of Intel's processes.
>
> You can see that going from 90nm to 65nm Intel improved the BEOL MT1
> by only 5%. They did exactly the same then as TSMC/IBM/Samsung/GF
> are doing now.
>
> It is due to the ignorance of the general public, which has no knowledge
> of the official process naming rules, that TSMC/IBM/Samsung/GF are
> forced to deviate from the official naming rules in the same way as Intel
> did.

>
>
> Now, if my actual point about nodes had been discussed we would not be going in circles.

The image