By: Michael S (already5chosen.delete@this.yahoo.com), August 29, 2014 6:43 am
Room: Moderated Discussions
anon (anon.delete@this.anon.com) on August 29, 2014 3:49 am wrote:
>
> Yes certainly, also POWER and x86 (even though they weren't able to get it right yet).
>
> But those are not yet (and maybe not ever) a good substitute for implementation of basic
> locks and counters. At least from measurement of x86 txn primitives. I would be surprised
> if POWER txn memory was equivalent speed to LL/SC. Don't know about z.
>
In my view Aaron was half right when he said: "Basically I look at LL/SC these days as a rather poor and broken implementation of transactional memory, with many of the downsides and none of the advantages."
I agree that LL/SC is a form of limited (although not broken) implementation of TM, but so far I am not convinced that non-broken implementation of TM has real-world advantages.
>
> Yes certainly, also POWER and x86 (even though they weren't able to get it right yet).
>
> But those are not yet (and maybe not ever) a good substitute for implementation of basic
> locks and counters. At least from measurement of x86 txn primitives. I would be surprised
> if POWER txn memory was equivalent speed to LL/SC. Don't know about z.
>
In my view Aaron was half right when he said: "Basically I look at LL/SC these days as a rather poor and broken implementation of transactional memory, with many of the downsides and none of the advantages."
I agree that LL/SC is a form of limited (although not broken) implementation of TM, but so far I am not convinced that non-broken implementation of TM has real-world advantages.
