hobold (hobold@informatik.uni-bremen.de) on 2/3/03 wrote:
---------------------------
>Paul DeMone (pdemone@igs.net) on 2/3/03 wrote:
>---------------------------
>>I think my fellow Intel shareholders are far more
>>interested in a resolution to the war fears gripping
>>North American stock markets.
>>
>You are distracting. What do you think, will they or won't
>they like your article? (Assuming they have the background
>necessary to follow you.)

I don't know. I predicted IPF performance will scale nicely.
OTOH I say its x86 performance is below par, Intel's chipset
is delayed, software availability limits near term sales
and market share penetration, and Intel deviated from the
x86 business model that made it successful and AMD picked
it up instead. Some might think I was unduely harsh against
Intel.


>>Go look at the ISSCC papers I referenced. Are you saying
>>that Intel lied in them?
>>
>I say that you give them the benefit of doubt. Not for a
>moment do you think that maybe paperwork is just paperwork,
>and that real silicon is what counts.

I give anyone presenting data in an ISSCC paper the
benefit of the doubt. To doubt the data is tantamount
to an allegation of serious professional misconduct.

>>I didn't say anything about POWER4 limitations as VLIW
>>related (VLIWs are invariably in-order machines BTW).
>
>I quote from your article:
>
>Instead it collects together up to 5 instructions at a time
>and then issues, tracks, and retires them as a group, kind
>of like a VLIW instruction.
>
>End of quote.

I guess I could have worded it more clearly but the
comparison was in reference to the interrelationship
of instructions within a POWER4 group and a VLIW
instruction. Obviously the OOO POWER4 and in-order
VLIW devices have much different microarchitectures,
especially related to pipeline control.

>
>>I merely pointed out that IBM took a big short cut in the
>>way it implemented OOO execution in the POWER4 and it is
>>demonstratably less efficienct than the issue checking
>>and dependency tracking instruction by instruction model
>>used in R1xk, PA-8x00, EV6x, P6, P4, K7, and K8.
>>
>I remember you preaching how silly it is to focus on
>isolated implementation details when overall performance is
>what counts (for example when people criticized P4 for its
>pipe length and the associated penalties). Now you do that
>yourself, not knowing what reasoning has lead IBM engineers
>to this architecture.

I think the "overall performance" of the POWER4 speaks
for itself given the resources available within each CPU,
the SOI processing, and the infrastructure that supports
each device. IMO it was a disappointment. Feel free to
have your own opinion. Feel free to write your own article
based on it.


>>Other half? Perhaps you should try to get a better grip
>>on the facts. :-)
>>
>OK, who designed K7 and K8?

Design teams that included *some* ex-Alpha designers. To
claim that AMD has "half" the former Alpha team as you did
is ridiculous. It also discounts the fact that key AMD ex-Alpha
people like Jim Keller left AMD when the K8 project
reportedly changed greatly in scope early on.

>>Then I don't understand why you are getting so bent out of
>>shape over this article.
>
>The latest article was only the drop that caused the
>barrel to spill (I guess english speakers will understand
>this supposedly foreign figure of speech).
>
>> Motorola doesn't make any MPUs
>>that fit within its scope. Perhaps in the future I'll write
>>more about the embedded control market.
>>
>I'd look forward to it. When you write about things that
>Intel's got nothing to do with, only the positive qualities
>of your writings remain.

Perhaps that speaks more about yourself than it does of
my writing. ;-)

>Call me egoistic, but I liked your early RWT articles so
>much better than the newer ones that I am angry about the
>writer you are today, because he has replaced the writer
>you were.

See my previous comment. There is an obvious solution.

BTW, unless you switch the topic from ad hominem attacks
on my opinion and integrity to a discussion confined to
the article itself I will not waste my time by responding
to any of your future posts.