Northwood P4 was still crap, beating much smaller severely memory limited K7 did not make it non-cra

By: Heikki Kultala (hkultala.delete@this.sefi.fi), November 14, 2014 12:40 pm
Room: Moderated Discussions
someone (someone.delete@this.somewhere.com) on November 14, 2014 8:20 am wrote:
> Linus Torvalds (torvalds.delete@this.linux-foundation.org) on November 13, 2014 5:57 pm wrote:
> > Doug S (foo.delete@this.bar.bar) on November 12, 2014 8:41 pm wrote:
> > >
> > > Intel was forced to abandon GHz based marketing when they went back to the P6 core which had lower
> > > clock rates but higher performance when the P4 hit the power wall
> >
> > Really, people complained about P4 on other reasons than power.
> >
> > The thing is, P4 just didn't perform that well. It had some really bad fragile failure points,
> > and while Intel ended up fixing the really obvious ones (early problems with 16-bit segments, nasty
> > ALU-shifter imbalance, some others) it still had tons of nasty glass jaws. Exception handling was
> > horrid, and any branchy code with bad prediction would simply not perform all that well.
> >
> > People always talk about the "power wall", but P4 failures were not just about that. P4 made it possible
> > for AMD to kick Intel ass, largely because P4 just wasn't very good. Not even at high frequencies. I don't
> > think it is at all a coincidence that AMD did so well with Opteron back when Intel was pushing P4.
>
> The 0.13 um Northwood P4 was a very good processor in its time and did better than
> the K7s it competed against.

The only reason Northwood was doing better than those late K7s was because Northwood
had much better bus/io system outside the core, those late K7's were scaling really badly because of horrible memory interface. And it was much bigger and more expensive chip to make.

Throughbreds had 256 kiB L2 cache and 266-400 MHz bus data rate. And die are which was 64% of northwoods die area.
Bartons which came later had 512 kiB L2 cache and 266-400 MHz bus data rate. And die area which was 77% of northwoods die area.

Those K7's could only practially take advantage of single-channel memory.

Nortwood had 512 kiB L2 cache and 400-800 Mhz bus data rate, and could well take advantage of dual-channel memory.

> The K8 (Opteron) pulled ahead of Northwood but not
> because of its CPU (which was basically a 64 bit-ized K7) but because it received
> a big bonus from its integrated memory controller/direct connect memory system.

I'd say this on other way:

The K8 core was not hindered by bad memory performance like late K7's was so it did well.
It did not receive big bonus, it juts lacked hindurance of slow memory io of k7.

> The P4's after Northwood had a much longer pipeline. That combined with a number
> of bad circuit implementation choices made the 90 nm Prescott arguably a *worse*
> product than Northwood.

Actually, Presscott fixed many of the willamette/northwood idiotisms, like the very slow shifts. But yes, some bad implementation prevented it from reaching the clock speeds it should have reached.

> The latter were corrected in the 65 nm follow-on but the P4's
> days were long since numbered because 1) its poor computational power efficiency
> was a poor match for the coming CMP world, and 2) Intel had a better design in hand.

They had the better design in hand much earlier. They just refused to sell it to desktop.
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                                                            Northwood P4 was still crap, beating much smaller severely memory limited K7 did not make it non-craHeikki Kultala2014/11/14 12:40 PM
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How do you spell tangerine? 🍊