John Mashey has a comp.arch post that is relevant (maybe)

By: Mark Roulo (nothanks.delete@this.xxx.com), November 24, 2014 4:17 pm
Room: Moderated Discussions
Jouni Osmala (josmala.delete@this.cc.hut.fi) on November 24, 2014 7:46 am wrote:
> Michael S (already5chosen.delete@this.yahoo.com) on November 23, 2014 11:24 am wrote:
> > Patrick Chase (patrickjchase.delete@this.gmail.com) on November 20, 2014 10:45 pm wrote:
> > > Michael S (already5chosen.delete@this.yahoo.com) on November 20, 2014 12:10 pm wrote:
> > > > Patrick Chase (patrickjchase.delete@this.gmail.com) on November 20, 2014 11:30 am wrote:
> > > > > People love to be snarky about Intel and ISA complexity (and they certainly earned
> > > > > some of that with i432), but completely overlook that they somehow ended up with the
> > > > > one CISC ISA that was simple enough that modern micro-architectural techniques such
> > > > > as superscalar and OoO could be economically applied. VAX, m68k, etc all died out
> > > > > by the mid 80s due to overwhelming complexity.
> > > >
> > > > Well, both VAX and m68k lasted until early 90s.
> > >
> > > Yeah, that was a typo. I meant mid 90s.
> > >
> > > > If their owners were a little more
> > > > stubborn, they would have been lasted into 5M+ gates era where they again could
> > > > have become speed-competitive with x386. They missed it by just 3-4 years.
> > >
> > > I think it would have taken longer than that. VAX and its descendents (which includes m68k) were
> > > literally orthogonal to a fault, in the sense that every operand of an instruction could use
> > > any addressing mode available.
> >
> >
> > Thinking about it, I agree. It would take significantly more than 5M gates. However I don't agree that m68k
> > was as bad as VAX. Even with all '020 cruft 68K was far
> > easier. On the other hand, due to "vertical" business
> > model, VAX could have afforded bigger die, lower yield, bigger
> > power budget and wider external buses, so despite
> > ISA inferiority it had potential of achieving competitive performance at about the same time as 68K.
>
>
> The same way Pentium Pro was able to make 3 way vax could of made it. Pentium pro had really high complexity
> instructions from slow micro code,then in each cycle medium to low complexity one per cycle decode, and
> two additional low complexity instructions 2 per cycle. There was nothing that prevented VAX from doing
> the same thing at same time as pentium pro. Only big problem VAX really would of had at PPRO timeframe
> was floating point, floating point used general purpose registers so you couldn't just have separate
> scheduler for them, but for integer there is no reason why DEC couldn't just make fast VAX compatible
> processor that truly shines with new compilers that emits simpler instructions more.
>
> Should DEC be able to use its business model to make a bigger
> VAX then it could of destroyed Pentium pro in performance.
>
> > > The "CISC penalty" for those makes x86 look like a party.
> > >
> >
> > Apart of disadvantages, both 68K and VAX shared one advantage over x86 - 2-byte granularity of
> > instructions. P6-style brute-force approach to parsing and early decoding would take relatively
> > less hardware resources. I don't believe that it could have helped VAX, but it could make 3-way
> > 68K feasible even in transistor budget that does not allow decent decoded instruction cache.


John Mashey post that is relevant: http://userpages.umbc.edu/~vijay/mashey.on.risc.html

Relevant bit:

General comment: this may sound weird, but in the long term, it might
be easier to deal with a really complicated bunch of instruction
formats, than with a complex set of addressing modes, because at least
the former is more amenable to pre-decoding into a cache of decoded
instructions that can be pipelined reasonably, whereas the pipeline on
the latter can get very tricky (examples to follow). This can lead to
the funny effect that a relatively "clean", orthogonal archiecture may
actually be harder to make run fast than one that is less clean.
Obviously, every weirdness has it's penalties.... But consider the
fundamental difficulty of pipelining something like (on a VAX):

And then a long discussion follows.

Maybe all the bad stuff for VAX could get pushed into the "this is old, don't use it for new/fast code" pipe. But if so, then DEC probably screwed up when they obsoleted the VAX.
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            How well does Soft Machines do on ARM/x86?none2014/10/25 02:15 PM
              jazelleHeikki Kultala2014/10/26 12:18 AM
      Soft MachinesPatrick Chase2014/10/24 01:27 PM
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          Soft MachinesPatrick Chase2014/10/28 10:59 AM
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        SemiAccurate on Soft Machinesdmcq2014/10/24 03:55 AM
        Are they on 28 nm?Kevin G2014/10/26 04:23 PM
          Are they on 28 nm?ex-apple2014/10/26 04:47 PM
      Soft Machinessomeone2014/10/24 08:53 AM
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  Soft Machines investorsMichael S2014/10/25 11:06 AM
    Why? (NT)Megol2014/10/25 12:46 PM
    Soft Machines investor backstoryex-apple2014/10/28 09:30 PM
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